From patchwork Mon May 3 12:55:57 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 96466 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o43CvM2e025241 for ; Mon, 3 May 2010 12:57:23 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758866Ab0ECM5L (ORCPT ); Mon, 3 May 2010 08:57:11 -0400 Received: from smtp.nokia.com ([192.100.122.233]:16693 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758771Ab0ECM5K (ORCPT ); Mon, 3 May 2010 08:57:10 -0400 Received: from vaebh106.NOE.Nokia.com (vaebh106.europe.nokia.com [10.160.244.32]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o43Cur0u004410; Mon, 3 May 2010 15:57:05 +0300 Received: from vaebh104.NOE.Nokia.com ([10.160.244.30]) by vaebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 3 May 2010 15:56:51 +0300 Received: from mgw-sa01.ext.nokia.com ([147.243.1.47]) by vaebh104.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 3 May 2010 15:56:51 +0300 Received: from localhost.localdomain (esdhcp04158.research.nokia.com [172.21.41.58]) by mgw-sa01.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o43CuoV8006683; Mon, 3 May 2010 15:56:50 +0300 From: Mika Westerberg To: tony@atomide.com Cc: linux-omap@vger.kernel.org, "\\\"Mika Westerberg\\\"" Subject: [PATCH] OMAP2/3/4: DMA: reset controller during init Date: Mon, 3 May 2010 15:55:57 +0300 Message-Id: <1272891357-27400-1-git-send-email-ext-mika.1.westerberg@nokia.com> X-Mailer: git-send-email 1.5.6.5 X-OriginalArrivalTime: 03 May 2010 12:56:51.0157 (UTC) FILETIME=[193DA050:01CAEAC0] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 03 May 2010 12:57:23 +0000 (UTC) diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 1d95996..24cbb97 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -2024,6 +2024,31 @@ void omap_dma_global_context_restore(void) /*----------------------------------------------------------------------------*/ +/** + * omap_dma_reset() - perform software reset for the DMA controller + */ +static void omap_dma_reset(void) +{ + u32 v; + + if (cpu_class_is_omap1()) + return; + + v = dma_read(OCP_SYSCONFIG); + v |= 0x2; /* software reset */ + dma_write(v, OCP_SYSCONFIG); + + /* wait until reset is complete */ + while ((dma_read(SYSSTATUS) & 0x1) == 0) + cpu_relax(); + + /* disable per channel interrupts */ + dma_write(0, IRQENABLE_L0); + dma_write(0, IRQENABLE_L1); + dma_write(0, IRQENABLE_L2); + dma_write(0, IRQENABLE_L3); +} + static int __init omap_init_dma(void) { unsigned long base; @@ -2069,6 +2094,13 @@ static int __init omap_init_dma(void) } } + /* + * Make sure that DMA is in reset state before doing anything else. If + * we are coming from softboot (e.g kexec) DMA is probably configured so + * we explicitly reset it here to get into known state. + */ + omap_dma_reset(); + if (cpu_is_omap15xx()) { printk(KERN_INFO "DMA support for OMAP15xx initialized\n"); dma_chan_count = 9; diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index 02232ca..9a55504 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -134,6 +134,10 @@ #define OMAP1_DMA_REVISION 0 #define OMAP1_DMA_IRQSTATUS_L0 0 #define OMAP1_DMA_IRQENABLE_L0 0 +#define OMAP1_DMA_IRQENABLE_L1 0 +#define OMAP1_DMA_IRQENABLE_L2 0 +#define OMAP1_DMA_IRQENABLE_L3 0 +#define OMAP1_DMA_SYSSTATUS 0 #define OMAP1_DMA_OCP_SYSCONFIG 0 #define OMAP_DMA4_HW_ID 0 #define OMAP_DMA4_CAPS_0_L 0