@@ -185,6 +185,38 @@ dsp_status bridge_deh_register_notify(struct deh_mgr *deh_mgr, u32 event_mask,
return status;
}
+static void wait_for_timer(void)
+{
+ u32 cnt = 0;
+
+ omap_dm_timer_enable(timer);
+
+ /* Enable overflow interrupt */
+ omap_dm_timer_set_int_enable(timer,
+ GPTIMER_IRQ_OVERFLOW);
+ /*
+ * Set counter value to overflow counter after
+ * one tick and start timer.
+ */
+ omap_dm_timer_set_load_start(timer, 0, 0xfffffffe);
+
+ /* Wait 80us for timer to overflow */
+ udelay(80);
+
+ /* Check interrupt status and wait for interrupt */
+ cnt = 0;
+ while (!(omap_dm_timer_read_status(timer) &
+ GPTIMER_IRQ_OVERFLOW)) {
+ if (cnt++ >= GPTIMER_IRQ_WAIT_MAX_CNT) {
+ pr_err("%s: GPTimer interrupt failed\n",
+ __func__);
+ break;
+ }
+ }
+
+ omap_dm_timer_disable(timer);
+}
+
void bridge_deh_notify(struct deh_mgr *deh_mgr, u32 ulEventMask, u32 dwErrInfo)
{
struct bridge_dev_context *dev_context;
@@ -192,7 +224,6 @@ void bridge_deh_notify(struct deh_mgr *deh_mgr, u32 ulEventMask, u32 dwErrInfo)
u32 hw_mmu_max_tlb_count = 31;
struct cfg_hostres *resources;
hw_status hw_status_obj;
- u32 cnt = 0;
if (!deh_mgr)
return;
@@ -249,42 +280,12 @@ void bridge_deh_notify(struct deh_mgr *deh_mgr, u32 ulEventMask, u32 dwErrInfo)
&map_attrs, HW_SET, HW_SET);
}
- /*
- * Send a GP Timer interrupt to DSP.
- * The DSP expects a GP timer interrupt after an
- * MMU-Fault Request GPTimer.
- */
- if (timer) {
- omap_dm_timer_enable(timer);
- /* Enable overflow interrupt */
- omap_dm_timer_set_int_enable(timer,
- GPTIMER_IRQ_OVERFLOW);
- /*
- * Set counter value to overflow counter after
- * one tick and start timer.
- */
- omap_dm_timer_set_load_start(timer, 0, 0xfffffffe);
-
- /* Wait 80us for timer to overflow */
- udelay(80);
-
- /* Check interrupt status and wait for interrupt */
- cnt = 0;
- while (!(omap_dm_timer_read_status(timer) &
- GPTIMER_IRQ_OVERFLOW)) {
- if (cnt++ >= GPTIMER_IRQ_WAIT_MAX_CNT) {
- pr_err("%s: GPTimer interrupt failed\n",
- __func__);
- break;
- }
- }
- }
+ wait_for_timer();
/* Clear MMU interrupt */
hw_mmu_event_ack(resources->dw_dmmu_base,
HW_MMU_TRANSLATION_FAULT);
dump_dsp_stack(deh_mgr->hbridge_context);
- omap_dm_timer_disable(timer);
break;
#ifdef CONFIG_BRIDGE_NTFY_PWRERR
case DSP_PWRERROR: