From patchwork Sun May 16 15:45:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Contreras X-Patchwork-Id: 99967 X-Patchwork-Delegate: omar.ramirez@ti.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o4GFkHfb025161 for ; Sun, 16 May 2010 15:46:17 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753221Ab0EPPqQ (ORCPT ); Sun, 16 May 2010 11:46:16 -0400 Received: from fg-out-1718.google.com ([72.14.220.157]:34390 "EHLO fg-out-1718.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753138Ab0EPPqP (ORCPT ); Sun, 16 May 2010 11:46:15 -0400 Received: by fg-out-1718.google.com with SMTP id 22so178499fge.1 for ; Sun, 16 May 2010 08:46:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=6GIFzWJNcEnpHANHX8qwqEXG5qGnRisk+C9Jkl3qSnk=; b=NZo8VYdQq6wheh56hfoRjWBvlKzfZ9DCXzX/jTVomfOfr6FumH7SSQVN7vNyCWLYDq T2BU/kRmFcx8mWV/csKemtgTj1b+aaqWtI+3dTIDskjeetMm/bS5zKoKVDosTxkY3PpL xAM0QGTFnHOyUZ/fJ5iSHyw5B7EjtX9G0FNH0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=hEDX/EbwsrzagcWffo+g3JDpA5OZCT8YAGuodNW/fUh4/t6bsmU3w+kk5NRRku+KMq K16Jw2dRv890eUklWD44bnc2+GLwLUlueTu5gNB2WVQh4LBUKhXRdKbpY/BvLpyyYVO7 okgRw8M9W/7XNRkdEcuihpVQCf99Jdy24WVCQ= Received: by 10.86.124.35 with SMTP id w35mr6782108fgc.49.1274024775137; Sun, 16 May 2010 08:46:15 -0700 (PDT) Received: from localhost (a91-153-253-80.elisa-laajakaista.fi [91.153.253.80]) by mx.google.com with ESMTPS id e20sm3755922fga.16.2010.05.16.08.46.13 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 16 May 2010 08:46:14 -0700 (PDT) From: Felipe Contreras To: linux-omap Cc: Omar Ramirez Luna , Fernando Guzman Lugo , Felipe Contreras Subject: [PATCH 03/14] dspbridge: mmufault: trivial cleanups Date: Sun, 16 May 2010 18:45:54 +0300 Message-Id: <1274024765-21076-4-git-send-email-felipe.contreras@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1274024765-21076-1-git-send-email-felipe.contreras@gmail.com> References: <1274024765-21076-1-git-send-email-felipe.contreras@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Sun, 16 May 2010 15:46:17 +0000 (UTC) diff --git a/drivers/dsp/bridge/core/mmu_fault.c b/drivers/dsp/bridge/core/mmu_fault.c index 883f45d..1de9cb4 100644 --- a/drivers/dsp/bridge/core/mmu_fault.c +++ b/drivers/dsp/bridge/core/mmu_fault.c @@ -42,11 +42,8 @@ #include "_tiomap.h" #include "mmu_fault.h" -static u32 dmmu_event_mask; u32 fault_addr; -static bool mmu_check_if_fault(struct bridge_dev_context *dev_context); - /* * ======== mmu_fault_dpc ======== * Deferred procedure call to handle DSP MMU fault. @@ -55,9 +52,10 @@ void mmu_fault_dpc(IN unsigned long pRefData) { struct deh_mgr *hdeh_mgr = (struct deh_mgr *)pRefData; - if (hdeh_mgr) - bridge_deh_notify(hdeh_mgr, DSP_MMUFAULT, 0L); + if (!hdeh_mgr) + return; + bridge_deh_notify(hdeh_mgr, DSP_MMUFAULT, 0L); } /* @@ -66,76 +64,44 @@ void mmu_fault_dpc(IN unsigned long pRefData) */ irqreturn_t mmu_fault_isr(int irq, IN void *pRefData) { - struct deh_mgr *deh_mgr_obj = (struct deh_mgr *)pRefData; - struct bridge_dev_context *dev_context; + struct deh_mgr *deh_mgr_obj = pRefData; struct cfg_hostres *resources; + u32 dmmu_event_mask; - DBC_REQUIRE(irq == INT_DSP_MMU_IRQ); - DBC_REQUIRE(deh_mgr_obj); - - if (deh_mgr_obj) { - - dev_context = - (struct bridge_dev_context *)deh_mgr_obj->hbridge_context; - - resources = dev_context->resources; + if (!deh_mgr_obj) + return IRQ_HANDLED; - if (!resources) { - dev_dbg(bridge, "%s: Failed to get Host Resources\n", + resources = deh_mgr_obj->hbridge_context->resources; + if (!resources) { + dev_dbg(bridge, "%s: Failed to get Host Resources\n", __func__); - return IRQ_HANDLED; - } - if (mmu_check_if_fault(dev_context)) { - printk(KERN_INFO "***** DSPMMU FAULT ***** IRQStatus " - "0x%x\n", dmmu_event_mask); - printk(KERN_INFO "***** DSPMMU FAULT ***** fault_addr " - "0x%x\n", fault_addr); - /* - * Schedule a DPC directly. In the future, it may be - * necessary to check if DSP MMU fault is intended for - * Bridge. - */ - tasklet_schedule(&deh_mgr_obj->dpc_tasklet); - - /* Reset err_info structure before use. */ - deh_mgr_obj->err_info.dw_err_mask = DSP_MMUFAULT; - deh_mgr_obj->err_info.dw_val1 = fault_addr >> 16; - deh_mgr_obj->err_info.dw_val2 = fault_addr & 0xFFFF; - deh_mgr_obj->err_info.dw_val3 = 0L; - /* Disable the MMU events, else once we clear it will - * start to raise INTs again */ - hw_mmu_event_disable(resources->dw_dmmu_base, - HW_MMU_TRANSLATION_FAULT); - } else { - hw_mmu_event_disable(resources->dw_dmmu_base, - HW_MMU_ALL_INTERRUPTS); - } + return IRQ_HANDLED; } - return IRQ_HANDLED; -} -/* - * ======== mmu_check_if_fault ======== - * Check to see if MMU Fault is valid TLB miss from DSP - * Note: This function is called from an ISR - */ -static bool mmu_check_if_fault(struct bridge_dev_context *dev_context) -{ - - bool ret = false; - hw_status hw_status_obj; - struct cfg_hostres *resources = dev_context->resources; - - if (!resources) { - dev_dbg(bridge, "%s: Failed to get Host Resources in\n", - __func__); - return ret; - } - hw_status_obj = - hw_mmu_event_status(resources->dw_dmmu_base, &dmmu_event_mask); + hw_mmu_event_status(resources->dw_dmmu_base, &dmmu_event_mask); if (dmmu_event_mask == HW_MMU_TRANSLATION_FAULT) { hw_mmu_fault_addr_read(resources->dw_dmmu_base, &fault_addr); - ret = true; + dev_info(bridge, "%s: status=0x%x, fault_addr=0x%x\n", __func__, + dmmu_event_mask, fault_addr); + /* + * Schedule a DPC directly. In the future, it may be + * necessary to check if DSP MMU fault is intended for + * Bridge. + */ + tasklet_schedule(&deh_mgr_obj->dpc_tasklet); + + /* Reset err_info structure before use. */ + deh_mgr_obj->err_info.dw_err_mask = DSP_MMUFAULT; + deh_mgr_obj->err_info.dw_val1 = fault_addr >> 16; + deh_mgr_obj->err_info.dw_val2 = fault_addr & 0xFFFF; + deh_mgr_obj->err_info.dw_val3 = 0L; + /* Disable the MMU events, else once we clear it will + * start to raise INTs again */ + hw_mmu_event_disable(resources->dw_dmmu_base, + HW_MMU_TRANSLATION_FAULT); + } else { + hw_mmu_event_disable(resources->dw_dmmu_base, + HW_MMU_ALL_INTERRUPTS); } - return ret; + return IRQ_HANDLED; }