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[1/2] omap: iommu-update irq mask to be specific about twl

Message ID 1274137950-18759-2-git-send-email-h-kanigeri2@ti.com (mailing list archive)
State Changes Requested, archived
Delegated to: Hiroshi DOYU
Headers show

Commit Message

Kanigeri, Hari May 17, 2010, 11:12 p.m. UTC 
None
diff mbox

Patch

diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index e82da68..fcf4f4a 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -46,7 +46,13 @@ 
 #define MMU_IRQ_TLBMISS		(1 << 0)
 #define MMU_IRQ_MASK	\
 	(MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \
-	 MMU_IRQ_TRANSLATIONFAULT)
+	  MMU_IRQ_TRANSLATIONFAULT | MMU_IRQ_TLBMISS)
+#define MMU_IRQ_TWL_MASK	\
+	(MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \
+	  MMU_IRQ_TRANSLATIONFAULT)
+#define MMU_IRQ_TLB_MISS_MASK	\
+	(MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TLBMISS | MMU_IRQ_EMUMISS | \
+	  MMU_IRQ_TRANSLATIONFAULT)
 
 /* MMU_CNTL */
 #define MMU_CNTL_SHIFT		1
@@ -96,7 +102,7 @@  static int omap2_iommu_enable(struct iommu *obj)
 	l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
 	iommu_write_reg(obj, l, MMU_SYSCONFIG);
 
-	iommu_write_reg(obj, MMU_IRQ_MASK, MMU_IRQENABLE);
+	iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
 	iommu_write_reg(obj, pa, MMU_TTB);
 
 	l = iommu_read_reg(obj, MMU_CNTL);