From patchwork Fri May 28 14:34:29 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripathy, Vishwanath" X-Patchwork-Id: 102902 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o4SEXGEu017164 for ; Fri, 28 May 2010 14:33:16 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757567Ab0E1OdI (ORCPT ); Fri, 28 May 2010 10:33:08 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:49893 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751037Ab0E1OdH (ORCPT ); Fri, 28 May 2010 10:33:07 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o4SEX4dg026413 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 28 May 2010 09:33:06 -0500 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o4SEX2CM007701; Fri, 28 May 2010 20:03:03 +0530 (IST) From: Vishwanath BS To: linux-omap@vger.kernel.org Cc: Vishwanath BS Subject: [PATCH] OMAP3 PM: Prevent Core off when DPLL3 autoidle is disabled Date: Fri, 28 May 2010 20:04:29 +0530 Message-Id: <1275057269-15863-1-git-send-email-vishwanath.bs@ti.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <> References: <> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 28 May 2010 14:33:16 +0000 (UTC) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b0a5d09..5b48b6c --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -461,6 +461,9 @@ void omap_sram_idle(void) } cm_rmw_mod_reg_bits(OMAP3430_AUTO_CORE_DPLL_MASK, 0x1, PLL_MOD, CM_AUTOIDLE); + } else if (core_next_state > PWRDM_POWER_RET) { + pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); + core_next_state = PWRDM_POWER_RET; } } }