From patchwork Thu Jun 3 04:39:33 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 103950 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o534dvF1031876 for ; Thu, 3 Jun 2010 04:40:55 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751563Ab0FCEkE (ORCPT ); Thu, 3 Jun 2010 00:40:04 -0400 Received: from smtp.nokia.com ([192.100.105.134]:25989 "EHLO mgw-mx09.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751301Ab0FCEkD (ORCPT ); Thu, 3 Jun 2010 00:40:03 -0400 Received: from esebh106.NOE.Nokia.com (esebh106.ntc.nokia.com [172.21.138.213]) by mgw-mx09.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o534dcM5027738; Wed, 2 Jun 2010 23:39:52 -0500 Received: from vaebh104.NOE.Nokia.com ([10.160.244.30]) by esebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 3 Jun 2010 07:39:49 +0300 Received: from mgw-da01.ext.nokia.com ([147.243.128.24]) by vaebh104.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Thu, 3 Jun 2010 07:39:49 +0300 Received: from cseresznye.nmp.nokia.com (cseresznye.nmp.nokia.com [172.22.211.20]) by mgw-da01.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o534daRD008370; Thu, 3 Jun 2010 07:39:43 +0300 From: Peter Ujfalusi To: alsa-devel@alsa-project.org, linux-omap@vger.kernel.org, tony@atomide.com Cc: broonie@opensource.wolfsonmicro.com, lrg@slimlogic.co.uk, jhnikula@gmail.com, ext-eero.nurkkala@nokia.com, eduardo.valentin@nokia.com Subject: [PATCH v5 2/5] OMAP3: McBSP: Change the way how the FIFO is handled Date: Thu, 3 Jun 2010 07:39:33 +0300 Message-Id: <1275539976-2075-3-git-send-email-peter.ujfalusi@nokia.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1275539976-2075-1-git-send-email-peter.ujfalusi@nokia.com> References: <1275539976-2075-1-git-send-email-peter.ujfalusi@nokia.com> X-OriginalArrivalTime: 03 Jun 2010 04:39:49.0482 (UTC) FILETIME=[CCF164A0:01CB02D6] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 03 Jun 2010 04:41:11 +0000 (UTC) diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 016fe60..ed9f562 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -132,7 +132,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP2_BASE, @@ -142,7 +142,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x3FF, + .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ }, { .phys_base = OMAP34XX_MCBSP3_BASE, @@ -152,7 +152,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP4_BASE, @@ -161,7 +161,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP5_BASE, @@ -170,7 +170,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 51d8abf..d883bbf 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -480,9 +480,9 @@ int omap_st_is_enabled(unsigned int id) EXPORT_SYMBOL(omap_st_is_enabled); /* - * omap_mcbsp_set_tx_threshold configures how to deal - * with transmit threshold. the threshold value and handler can be - * configure in here. + * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. + * The threshold parameter is 1 based, and it is converted (threshold - 1) + * for the THRSH2 register. */ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) { @@ -497,14 +497,15 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) } mcbsp = id_to_mcbsp_ptr(id); - MCBSP_WRITE(mcbsp, THRSH2, threshold); + if (threshold && threshold <= mcbsp->max_tx_thres) + MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); } EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); /* - * omap_mcbsp_set_rx_threshold configures how to deal - * with receive threshold. the threshold value and handler can be - * configure in here. + * omap_mcbsp_set_rx_threshold configures the receive threshold in words. + * The threshold parameter is 1 based, and it is converted (threshold - 1) + * for the THRSH1 register. */ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) { @@ -519,7 +520,8 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) } mcbsp = id_to_mcbsp_ptr(id); - MCBSP_WRITE(mcbsp, THRSH1, threshold); + if (threshold && threshold <= mcbsp->max_rx_thres) + MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); } EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); @@ -1696,8 +1698,16 @@ static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) { mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; if (cpu_is_omap34xx()) { - mcbsp->max_tx_thres = max_thres(mcbsp); - mcbsp->max_rx_thres = max_thres(mcbsp); + /* + * Initially configure the maximum thresholds to a safe value. + * The McBSP FIFO usage with these values should not go under + * 16 locations. + * If the whole FIFO without safety buffer is used, than there + * is a possibility that the DMA will be not able to push the + * new data on time, causing channel shifts in runtime. + */ + mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; + mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; /* * REVISIT: Set dmap_op_mode to THRESHOLD as default * for mcbsp2 instances.