From patchwork Sun Jul 4 13:34:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Contreras X-Patchwork-Id: 110133 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o64DYtfJ004385 for ; Sun, 4 Jul 2010 13:34:55 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757739Ab0GDNey (ORCPT ); Sun, 4 Jul 2010 09:34:54 -0400 Received: from mail-bw0-f46.google.com ([209.85.214.46]:40955 "EHLO mail-bw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757698Ab0GDNex (ORCPT ); Sun, 4 Jul 2010 09:34:53 -0400 Received: by mail-bw0-f46.google.com with SMTP id 1so2295322bwz.19 for ; Sun, 04 Jul 2010 06:34:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=3CDlXvJC8egwdMXM3GaIu8zCDsPO+lQ5hLYthamITRI=; b=XaRhbN3AH+odcT/k1ujSCV5HZ+8DYh5Tg6bslPD/3wb962SXJtqxLJvwJXLeN1KjA7 xm0JPqN2DcOEh4/z1fGCHHPwM9I+5oPO1qcG4wscER1PXpZYNGh9NQdufInKmBJ6+luM D916H9ekOaQwijysRs0LBeQMsy7IKdWvwDx7Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=FMguOLWz27tSYqg0XB8Ljd84MTwSHzwy+L6sGQ35Cau9PwJdK7v/EB26iMqivaQRX0 wIEb5H+b7ZD1bVOI4SHPngQ1TAPmq7Ai4Mn/foZBfeSWcX0VGh6+nsHhA9eRFtQclhDs kJc1rl7a6LUlCE+ceGMiE8hxfc4ZDESypPiEY= Received: by 10.204.46.159 with SMTP id j31mr1344757bkf.5.1278250492450; Sun, 04 Jul 2010 06:34:52 -0700 (PDT) Received: from localhost (a91-153-253-80.elisa-laajakaista.fi [91.153.253.80]) by mx.google.com with ESMTPS id s17sm9762678bkx.18.2010.07.04.06.34.51 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 04 Jul 2010 06:34:52 -0700 (PDT) From: Felipe Contreras To: linux-omap Cc: Ohad Ben-Cohen , Omar Ramirez Luna , Greg KH , Felipe Contreras Subject: [PATCH 05/13] staging: ti dspbridge: mmu: add hw_mmu_tlb_flush_all() Date: Sun, 4 Jul 2010 16:34:31 +0300 Message-Id: <1278250479-16982-6-git-send-email-felipe.contreras@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1278250479-16982-1-git-send-email-felipe.contreras@gmail.com> References: <1278250479-16982-1-git-send-email-felipe.contreras@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Sun, 04 Jul 2010 13:34:55 +0000 (UTC) diff --git a/drivers/staging/tidspbridge/core/tiomap3430.c b/drivers/staging/tidspbridge/core/tiomap3430.c index d1fa560..1000c04 100644 --- a/drivers/staging/tidspbridge/core/tiomap3430.c +++ b/drivers/staging/tidspbridge/core/tiomap3430.c @@ -73,8 +73,6 @@ #define PAGES_II_LVL_TABLE 512 #define PHYS_TO_PAGE(phys) pfn_to_page((phys) >> PAGE_SHIFT) -#define MMU_GFLUSH 0x60 - /* Forward Declarations: */ static int bridge_brd_monitor(struct bridge_dev_context *dev_context); static int bridge_brd_read(struct bridge_dev_context *dev_context, @@ -218,18 +216,13 @@ static struct bridge_drv_interface drv_interface_fxns = { bridge_msg_set_queue_id, }; -static inline void tlb_flush_all(const void __iomem *base) -{ - __raw_writeb(__raw_readb(base + MMU_GFLUSH) | 1, base + MMU_GFLUSH); -} - static inline void flush_all(struct bridge_dev_context *dev_context) { if (dev_context->dw_brd_state == BRD_DSP_HIBERNATION || dev_context->dw_brd_state == BRD_HIBERNATION) wake_dsp(dev_context, NULL); - tlb_flush_all(dev_context->dw_dsp_mmu_base); + hw_mmu_tlb_flush_all(dev_context->dw_dsp_mmu_base); } static void bad_page_dump(u32 pa, struct page *pg) diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.c b/drivers/staging/tidspbridge/hw/hw_mmu.c index 965b659..e593358 100644 --- a/drivers/staging/tidspbridge/hw/hw_mmu.c +++ b/drivers/staging/tidspbridge/hw/hw_mmu.c @@ -35,6 +35,7 @@ #define MMU_SMALL_PAGE_MASK 0xFFFFF000 #define MMU_LOAD_TLB 0x00000001 +#define MMU_GFLUSH 0x60 /* * hw_mmu_page_size_t: Enumerated Type used to specify the MMU Page Size(SLSS) @@ -585,3 +586,8 @@ static hw_status mmu_set_ram_entry(const void __iomem *baseAddress, return status; } + +void hw_mmu_tlb_flush_all(const void __iomem *base) +{ + __raw_writeb(1, base + MMU_GFLUSH); +} diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.h b/drivers/staging/tidspbridge/hw/hw_mmu.h index 9b13468..0436974 100644 --- a/drivers/staging/tidspbridge/hw/hw_mmu.h +++ b/drivers/staging/tidspbridge/hw/hw_mmu.h @@ -97,6 +97,8 @@ extern hw_status hw_mmu_pte_set(const u32 pg_tbl_va, extern hw_status hw_mmu_pte_clear(const u32 pg_tbl_va, u32 page_size, u32 virtualAddr); +void hw_mmu_tlb_flush_all(const void __iomem *base); + static inline u32 hw_mmu_pte_addr_l1(u32 L1_base, u32 va) { u32 pte_addr;