From patchwork Thu Sep 23 12:34:47 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 201822 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8NCZ67p003533 for ; Thu, 23 Sep 2010 12:35:06 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755164Ab0IWMfE (ORCPT ); Thu, 23 Sep 2010 08:35:04 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:50871 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753546Ab0IWMfC (ORCPT ); Thu, 23 Sep 2010 08:35:02 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o8NCYvbD006770 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 23 Sep 2010 07:34:59 -0500 Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o8NCYrBV028412; Thu, 23 Sep 2010 18:04:53 +0530 (IST) Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by linfarm476.india.ti.com (8.12.11/8.12.11) with ESMTP id o8NCYrYp026519; Thu, 23 Sep 2010 18:04:53 +0530 Received: (from a0131687@localhost) by linfarm476.india.ti.com (8.12.11/8.12.11/Submit) id o8NCYrAW026517; Thu, 23 Sep 2010 18:04:53 +0530 From: Rajendra Nayak To: linux-omap@vger.kernel.org Cc: paul@pwsan.com, khilman@deeprootsystems.com, b-cousson@ti.com, Rajendra Nayak Subject: [RFC 4/8] OMAP: powerdomain: Arch specific funcs for logic control Date: Thu, 23 Sep 2010 18:04:47 +0530 Message-Id: <1285245291-26442-5-git-send-email-rnayak@ti.com> X-Mailer: git-send-email 1.5.6.6 In-Reply-To: <1285245291-26442-4-git-send-email-rnayak@ti.com> References: <1285245291-26442-1-git-send-email-rnayak@ti.com> <1285245291-26442-2-git-send-email-rnayak@ti.com> <1285245291-26442-3-git-send-email-rnayak@ti.com> <1285245291-26442-4-git-send-email-rnayak@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Thu, 23 Sep 2010 12:35:06 +0000 (UTC) diff --git a/arch/arm/mach-omap2/powerdomains2xxx.c b/arch/arm/mach-omap2/powerdomains2xxx.c index b0c4550..578bb19 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx.c +++ b/arch/arm/mach-omap2/powerdomains2xxx.c @@ -12,18 +12,11 @@ */ #include -#include +#include +#include #include -#include #include - -#include "pm.h" -#include "cm.h" -#include "cm-regbits-34xx.h" -#include "cm-regbits-44xx.h" -#include "prm.h" -#include "prm-regbits-34xx.h" -#include "prm-regbits-44xx.h" +#include "powerdomains.h" int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { @@ -50,9 +43,43 @@ int omap2_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) OMAP3430_LASTPOWERSTATEENTERED_MASK); } +int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); + prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + + return 0; +} + +int omap2_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, + OMAP3430_LOGICSTATEST_MASK); +} + + +int omap2_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED_MASK); +} + +int omap2_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, + OMAP3430_LOGICSTATEST_MASK); +} + struct pwrdm_functions omap2_pwrdm_functions = { .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, .pwrdm_read_prev_pwrst = omap2_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap2_pwrdm_read_logic_pwrst, + .pwrdm_read_prev_logic_pwrst = omap2_pwrdm_read_prev_logic_pwrst, + .pwrdm_read_logic_retst = omap2_pwrdm_read_logic_retst, }; diff --git a/arch/arm/mach-omap2/powerdomains44xx.c b/arch/arm/mach-omap2/powerdomains44xx.c index aba2219..27f3dc9 100644 --- a/arch/arm/mach-omap2/powerdomains44xx.c +++ b/arch/arm/mach-omap2/powerdomains44xx.c @@ -12,18 +12,11 @@ */ #include -#include +#include +#include #include -#include #include - -#include "pm.h" -#include "cm.h" -#include "cm-regbits-34xx.h" -#include "cm-regbits-44xx.h" -#include "prm.h" -#include "prm-regbits-34xx.h" -#include "prm-regbits-44xx.h" +#include "powerdomains.h" int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { @@ -51,9 +44,35 @@ int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) OMAP4430_LASTPOWERSTATEENTERED_MASK); } +int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); + prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + + return 0; +} + +int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, + OMAP4430_LOGICSTATEST_MASK); +} + +int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, + OMAP4430_LOGICRETSTATE_MASK); +} + struct pwrdm_functions omap4_pwrdm_functions = { .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, }; diff --git a/arch/arm/plat-omap/powerdomain.c b/arch/arm/plat-omap/powerdomain.c index 3a1845a..9b226cc 100644 --- a/arch/arm/plat-omap/powerdomain.c +++ b/arch/arm/plat-omap/powerdomain.c @@ -521,7 +521,7 @@ int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) */ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) { - u32 v; + int ret = -EINVAL; if (!pwrdm) return -EINVAL; @@ -532,17 +532,10 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n", pwrdm->name, pwrst); - /* - * The register bit names below may not correspond to the - * actual names of the bits in each powerdomain's register, - * but the type of value returned is the same for each - * powerdomain. - */ - v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); - prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, - pwrdm->prcm_offs, pwrstctrl_reg_offs); + if (arch_pwrdm->pwrdm_set_logic_retst) + ret = arch_pwrdm->pwrdm_set_logic_retst(pwrdm, pwrst); - return 0; + return ret; } /** @@ -685,11 +678,15 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) */ int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) { + int ret = -EINVAL; + if (!pwrdm) return -EINVAL; - return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstst_reg_offs, - OMAP3430_LOGICSTATEST_MASK); + if (arch_pwrdm->pwrdm_read_logic_pwrst) + ret = arch_pwrdm->pwrdm_read_logic_pwrst(pwrdm); + + return ret; } /** @@ -702,17 +699,15 @@ int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) */ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) { + int ret = -EINVAL; + if (!pwrdm) return -EINVAL; - /* - * The register bit names below may not correspond to the - * actual names of the bits in each powerdomain's register, - * but the type of value returned is the same for each - * powerdomain. - */ - return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, - OMAP3430_LASTLOGICSTATEENTERED_MASK); + if (arch_pwrdm->pwrdm_read_prev_logic_pwrst) + ret = arch_pwrdm->pwrdm_read_prev_logic_pwrst(pwrdm); + + return ret; } /** @@ -725,17 +720,15 @@ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) */ int pwrdm_read_logic_retst(struct powerdomain *pwrdm) { + int ret = -EINVAL; + if (!pwrdm) return -EINVAL; - /* - * The register bit names below may not correspond to the - * actual names of the bits in each powerdomain's register, - * but the type of value returned is the same for each - * powerdomain. - */ - return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstctrl_reg_offs, - OMAP3430_LOGICSTATEST_MASK); + if (arch_pwrdm->pwrdm_read_logic_retst) + ret = arch_pwrdm->pwrdm_read_logic_retst(pwrdm); + + return ret; } /**