From patchwork Sun Nov 7 21:43:26 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Contreras X-Patchwork-Id: 307352 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oA7LiiO7030010 for ; Sun, 7 Nov 2010 21:44:44 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753554Ab0KGVof (ORCPT ); Sun, 7 Nov 2010 16:44:35 -0500 Received: from mail-fx0-f46.google.com ([209.85.161.46]:44122 "EHLO mail-fx0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751711Ab0KGVoe (ORCPT ); Sun, 7 Nov 2010 16:44:34 -0500 Received: by mail-fx0-f46.google.com with SMTP id 16so3600214fxm.19 for ; Sun, 07 Nov 2010 13:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=ZhhvfTiqT9mn5V8JrUEdW9a6+Mr6lUYK00mGs2MKfqY=; b=g81r2ztPPmatJbMJZPMmWzz+4mZ1cf1xAgvVTfA/wvUYJlIkoMgxvgfx1uxXGeh9cn 3dPN528zsNNhReSZ2tmSZGMYyRTKoWOor1xm+B/hCtGWuOeKoiVNBYlj7E3B/DJuQXcW c1c5Ub75MdjB22yaPSBzOWBXu/dDrFCJBE0X8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=wyZZyNJmgONAoTNisMoS00tlL8FMVOa0IsKCk9sn2Y7+lQqmbzWUCwyUKZl1kx6Jsx nEm8pBSjmpcE1aXTFFV+xgHVDxYDAORVqI1OBZgjWEiprG+UHSnzUPvaT6LHerliCNDN t42F2EEa2pjF4CKt/PyIL8kozI0xGIDjDHJtE= Received: by 10.223.103.4 with SMTP id i4mr1684440fao.70.1289166273738; Sun, 07 Nov 2010 13:44:33 -0800 (PST) Received: from localhost (a91-153-253-80.elisa-laajakaista.fi [91.153.253.80]) by mx.google.com with ESMTPS id c40sm633953fay.2.2010.11.07.13.44.26 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 07 Nov 2010 13:44:33 -0800 (PST) From: Felipe Contreras To: linux-omap , Greg KH Cc: Omar Ramirez Luna , Tony Lindgren , Paul Walmsley , Fernando Guzman Lugo , Felipe Contreras Subject: [PATCH 2/5] omap: control: add functions for DSP boot Date: Sun, 7 Nov 2010 23:43:26 +0200 Message-Id: <1289166209-32251-3-git-send-email-felipe.contreras@gmail.com> X-Mailer: git-send-email 1.7.3.2.3.gf8529 In-Reply-To: References: Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sun, 07 Nov 2010 21:44:44 +0000 (UTC) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 1fa3294..808abeb 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -209,6 +209,55 @@ void omap4_ctrl_pad_writel(u32 val, u16 offset) __raw_writel(val, OMAP4_CTRL_PAD_REGADDR(offset)); } +/* OMAP DSP control functions */ + +/** + * omap_ctrl_set_dsp_bootaddr - set the DSP's boot address + * @pa: DSP boot address (in physical memory) + * + * Set the DSP's boot address. This is an address in physical memory. + * No return value. XXX The TRM claims that this is an "index to a + * 4kByte page". If so, why is the bitfield 21 bits wide, rather than + * 20? + */ +void omap_ctrl_set_dsp_bootaddr(u32 pa) +{ + if (!(cpu_is_omap2430() || cpu_is_omap34xx())) { + WARN(1, "control: %s: not supported on this SoC\n", __func__); + return; + } + + WARN(pa & ~OMAP_CTRL_DSP_BOOTADDR_MASK, + "control: %s: invalid DSP boot address %08x\n", __func__, pa); + + omap_ctrl_writel(pa, OMAP243X_CONTROL_IVA2_BOOTADDR); +} + +/** + * omap_ctrl_set_dsp_bootmode - set the DSP's boot mode + * @mode: DSP boot mode (described below) + * + * Sets the DSP boot mode - see OMAP3 TRM revision ZH section 7.4.7.4 + * "IVA2.2 Boot Registers". Known values of @mode include 0, to boot + * directly to the address supplied by omap2_ctrl_set_dsp_bootaddr(); + * 1, to boot to the DSP's ROM code and idle, waiting for interrupts; + * 2, to boot to the DSP's ROM code and spin in an idle loop; 3, to + * copy the user's bootstrap code from the DSP's internal memory and + * execute it (XXX how does the DSP know where to copy from?); and 4, + * to execute the DSP ROM code's context restore code. No return + * value. + */ +void omap_ctrl_set_dsp_bootmode(u8 mode) +{ + if (!(cpu_is_omap2430() || cpu_is_omap34xx())) { + WARN(1, "control: %s: not supported on this SoC\n", __func__); + return; + } + + omap_ctrl_writel(mode, OMAP243X_CONTROL_IVA2_BOOTMOD); +} + + #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) /* * Clears the scratchpad contents in case of cold boot- diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index b6c6b7c..105ee00 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -258,11 +258,6 @@ /* CONTROL_PROG_IO1 bits */ #define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) -/* CONTROL_IVA2_BOOTMOD bits */ -#define OMAP3_IVA2_BOOTMOD_SHIFT 0 -#define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) -#define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) - /* CONTROL_PADCONF_X bits */ #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) @@ -330,6 +325,8 @@ #define FEAT_NEON 0 #define FEAT_NEON_NONE 1 +/* DSP booting-related constants */ +#define OMAP_CTRL_DSP_BOOTADDR_MASK 0xfffffc00 #ifndef __ASSEMBLY__ #ifdef CONFIG_ARCH_OMAP2PLUS @@ -351,6 +348,9 @@ extern u32 omap3_arm_context[128]; extern void omap3_control_save_context(void); extern void omap3_control_restore_context(void); +extern void omap_ctrl_set_dsp_bootaddr(u32 pa); +extern void omap_ctrl_set_dsp_bootmode(u8 mode); + #else #define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h index 9c604b3..079691d 100644 --- a/arch/arm/plat-omap/include/plat/dsp.h +++ b/arch/arm/plat-omap/include/plat/dsp.h @@ -28,4 +28,10 @@ extern void omap_dsp_reserve_sdram_memblock(void); static inline void omap_dsp_reserve_sdram_memblock(void) { } #endif +#define OMAP_DSP_BOOTMODE_USER 0 +#define OMAP_DSP_BOOTMODE_IDLE 1 +#define OMAP_DSP_BOOTMODE_BUSYLOOP 2 +#define OMAP_DSP_BOOTMODE_COPY 3 +#define OMAP_DSP_BOOTMODE_RESTORE 4 + #endif