@@ -90,6 +90,18 @@ extern unsigned int omap34xx_cpu_suspend_sz;
* @size: size of copy to be saved - this is based on the PPA used
* secure ram size could be configured to various sizes, this is
* the size used + 64 byte header required.
+ * @save_every_cycle: While going to OFF mode and coming out of it on HS/EMU
+ * devices, secure service is provided to enable saving the
+ * contexts of secure ram and secure status of various drivers
+ * using secure devices. However, there are many kinds of secure
+ * conditions in the wild:
+ * 1. Implements its own save and restore using pm hooks
+ * 2. Generic drivers which depend on OMAP PM code to handle the
+ * same correspondingly, PPA may or may not allow capability
+ * to save in every transition to OFF mode.
+ * 3. PPA may be buggy and does'nt allow multiple saves
+ * Support of this depends heavily on the PPA used and the security
+ * driver capability. If in doubt, contact the security team.
*
* Different platforms use different security PPAs based on their unique needs.
* This structure describes the delta behavior expected for these custom
@@ -97,6 +109,7 @@ extern unsigned int omap34xx_cpu_suspend_sz;
*/
struct omap3_secure_copy_data {
u32 size;
+ bool save_every_cycle;
};
#if defined(CONFIG_PM)
@@ -57,6 +57,7 @@
/* Secure ram save size - store the defaults */
static struct omap3_secure_copy_data secure_copy_data = {
.size = 0x803F,
+ .save_every_cycle = false, /* explicit for readability */
};
struct power_state {
@@ -199,7 +200,8 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
secure_ram_save_status = _omap_save_secure_sram((u32 *)
__pa(omap3_secure_ram_storage));
pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state);
- secure_ram_saved = 1;
+ if (!secure_copy_data.save_every_cycle)
+ secure_ram_saved = 1;
}
}