From patchwork Thu Feb 3 13:56:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raghuveer Murthy X-Patchwork-Id: 529391 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p13E2SSR008314 for ; Thu, 3 Feb 2011 14:02:54 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932162Ab1BCOC3 (ORCPT ); Thu, 3 Feb 2011 09:02:29 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:33672 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756421Ab1BCOC2 (ORCPT ); Thu, 3 Feb 2011 09:02:28 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p13E2HxZ018811 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 3 Feb 2011 08:02:20 -0600 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p13E2EFi004701; Thu, 3 Feb 2011 19:32:17 +0530 (IST) From: Raghuveer Murthy To: tomba@iki.fi Cc: linux-omap@vger.kernel.org Subject: [PATCH 4/4] OMAP: DSS2: Get OMAP4 DPLL fclk for DPI interface Date: Thu, 3 Feb 2011 19:26:59 +0530 Message-Id: <1296741419-9037-5-git-send-email-raghuveer.murthy@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1296741419-9037-1-git-send-email-raghuveer.murthy@ti.com> References: <1296741419-9037-1-git-send-email-raghuveer.murthy@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 03 Feb 2011 14:02:54 +0000 (UTC) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 654f5e6..d76bc26 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -628,6 +628,13 @@ static int dss_init(bool skip_init) r = PTR_ERR(dss.dpll_per_mx_ck); goto fail2; } + } else if (cpu_is_omap44xx()) { + dss.dpll_per_mx_ck = clk_get(NULL, "dpll_per_m5x2_ck"); + if (IS_ERR(dss.dpll_per_mx_ck)) { + DSSERR("Failed to get dpll_per_mx_ck\n"); + r = PTR_ERR(dss.dpll_per_mx_ck); + goto fail2; + } } dss.dsi_clk_source = DSS_SRC_DSS1_ALWON_FCLK;