From patchwork Wed Feb 16 10:13:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Gadiyar X-Patchwork-Id: 566531 X-Patchwork-Delegate: me@felipebalbi.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1GADQu5000886 for ; Wed, 16 Feb 2011 10:13:26 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755420Ab1BPKNY (ORCPT ); Wed, 16 Feb 2011 05:13:24 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:53637 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754055Ab1BPKNX (ORCPT ); Wed, 16 Feb 2011 05:13:23 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p1GADGAc006014 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 16 Feb 2011 04:13:18 -0600 Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p1GADEgO026817; Wed, 16 Feb 2011 15:43:14 +0530 (IST) Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by linfarm476.india.ti.com (8.12.11/8.12.11) with ESMTP id p1GADEj6026344; Wed, 16 Feb 2011 15:43:14 +0530 Received: (from a0393673@localhost) by linfarm476.india.ti.com (8.12.11/8.12.11/Submit) id p1GADEk9026342; Wed, 16 Feb 2011 15:43:14 +0530 From: Anand Gadiyar To: linux-usb@vger.kernel.org, linux-omap@vger.kernel.org Cc: Anand Gadiyar , Greg Kroah-Hartman Subject: [PATCH] usb: ehci-omap: add support for TLL mode on OMAP4 Date: Wed, 16 Feb 2011 15:43:14 +0530 Message-Id: <1297851194-26264-1-git-send-email-gadiyar@ti.com> X-Mailer: git-send-email 1.5.6.6 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 16 Feb 2011 10:13:26 +0000 (UTC) Index: linux-omap-usb/drivers/usb/host/ehci-omap.c =================================================================== --- linux-omap-usb.orig/drivers/usb/host/ehci-omap.c +++ linux-omap-usb/drivers/usb/host/ehci-omap.c @@ -195,7 +195,11 @@ struct ehci_hcd_omap { struct clk *xclk60mhsp1_ck; struct clk *xclk60mhsp2_ck; struct clk *utmi_p1_fck; + struct clk *usbhost_p1_fck; + struct clk *usbtll_p1_fck; struct clk *utmi_p2_fck; + struct clk *usbhost_p2_fck; + struct clk *usbtll_p2_fck; /* FIXME the following two workarounds are * board specific not silicon-specific so these @@ -410,6 +414,50 @@ static int omap_start_ehc(struct ehci_hc } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp1_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp1_ck)) { + ret = PTR_ERR(omap->xclk60mhsp1_ck); + dev_err(omap->dev, + "Unable to get Port1 ULPI clock\n"); + } + + omap->utmi_p1_fck = clk_get(omap->dev, + "utmi_p1_gfclk"); + if (IS_ERR(omap->utmi_p1_fck)) { + ret = PTR_ERR(omap->utmi_p1_fck); + dev_err(omap->dev, + "Unable to get utmi_p1_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p1_fck, + omap->xclk60mhsp1_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P1 f-clock\n"); + } + + omap->usbhost_p1_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p1_clk"); + if (IS_ERR(omap->usbhost_p1_fck)) { + ret = PTR_ERR(omap->usbhost_p1_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 1 clk\n"); + } else { + clk_enable(omap->usbhost_p1_fck); + } + + omap->usbtll_p1_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch0_clk"); + + if (IS_ERR(omap->usbtll_p1_fck)) { + ret = PTR_ERR(omap->usbtll_p1_fck); + dev_err(omap->dev, + "Unable to get TLL CH0 clk\n"); + } else { + clk_enable(omap->usbtll_p1_fck); + } + break; /* TODO */ default: break; @@ -440,6 +488,50 @@ static int omap_start_ehc(struct ehci_hc } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp2_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp2_ck)) { + ret = PTR_ERR(omap->xclk60mhsp2_ck); + dev_err(omap->dev, + "Unable to get Port2 ULPI clock\n"); + } + + omap->utmi_p2_fck = clk_get(omap->dev, + "utmi_p2_gfclk"); + if (IS_ERR(omap->utmi_p2_fck)) { + ret = PTR_ERR(omap->utmi_p2_fck); + dev_err(omap->dev, + "Unable to get utmi_p2_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p2_fck, + omap->xclk60mhsp2_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P2 f-clock\n"); + } + + omap->usbhost_p2_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p2_clk"); + if (IS_ERR(omap->usbhost_p2_fck)) { + ret = PTR_ERR(omap->usbhost_p2_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 2 clk\n"); + } else { + clk_enable(omap->usbhost_p2_fck); + } + + omap->usbtll_p2_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch1_clk"); + + if (IS_ERR(omap->usbtll_p2_fck)) { + ret = PTR_ERR(omap->usbtll_p2_fck); + dev_err(omap->dev, + "Unable to get TLL CH1 clk\n"); + } else { + clk_enable(omap->usbtll_p2_fck); + } + break; /* TODO */ default: break; @@ -602,6 +694,24 @@ static int omap_start_ehc(struct ehci_hc return 0; err_sys_status: + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + } + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + } + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + } + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + } + clk_disable(omap->utmi_p2_fck); clk_put(omap->utmi_p2_fck); clk_disable(omap->xclk60mhsp2_ck); @@ -740,6 +850,30 @@ static void omap_stop_ehc(struct ehci_hc clk_put(omap->utmi_p2_fck); omap->utmi_p2_fck = NULL; } + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + omap->usbtll_p2_fck = NULL; + } + + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + omap->usbhost_p2_fck = NULL; + } + + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + omap->usbtll_p1_fck = NULL; + } + + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + omap->usbhost_p1_fck = NULL; + } } if (omap->phy_reset) {