From patchwork Sat Feb 19 12:01:53 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 574801 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1JC2BhG013921 for ; Sat, 19 Feb 2011 12:03:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754376Ab1BSMD7 (ORCPT ); Sat, 19 Feb 2011 07:03:59 -0500 Received: from na3sys009aog112.obsmtp.com ([74.125.149.207]:52131 "EHLO na3sys009aog112.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754154Ab1BSMD6 (ORCPT ); Sat, 19 Feb 2011 07:03:58 -0500 Received: from source ([209.85.161.173]) (using TLSv1) by na3sys009aob112.postini.com ([74.125.148.12]) with SMTP ID DSNKTV+xrhp25ANPIyTJmup597R1hNjYLPCc@postini.com; Sat, 19 Feb 2011 04:03:58 PST Received: by gxk28 with SMTP id 28so2063083gxk.32 for ; Sat, 19 Feb 2011 04:03:57 -0800 (PST) Received: by 10.150.190.8 with SMTP id n8mr2443187ybf.210.1298117037511; Sat, 19 Feb 2011 04:03:57 -0800 (PST) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id q3sm1042189ybe.7.2011.02.19.04.03.53 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 19 Feb 2011 04:03:56 -0800 (PST) From: Nishanth Menon To: linux-omap Cc: Tony Lindgren , Kevin Hilman , Nishanth Menon Subject: [PATCH 14/19] omap3+: sr: introduce notifiers flags Date: Sat, 19 Feb 2011 17:31:53 +0530 Message-Id: <1298116918-30744-15-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1298116918-30744-1-git-send-email-nm@ti.com> References: <1298116918-30744-1-git-send-email-nm@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Sat, 19 Feb 2011 12:03:59 +0000 (UTC) diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 65431df..165f6f3 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -123,27 +123,94 @@ static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) return ERR_PTR(-ENODATA); } +static inline u32 notifier_to_irqen_v1(u8 notify_flags) +{ + u32 val; + val = (notify_flags & SR_NOTIFY_MCUACCUM) ? + ERRCONFIG_MCUACCUMINTEN : 0; + val |= (notify_flags & SR_NOTIFY_MCUVALID) ? + ERRCONFIG_MCUVALIDINTEN : 0; + val |= (notify_flags & SR_NOTIFY_MCUBOUND) ? + ERRCONFIG_MCUBOUNDINTEN : 0; + val |= (notify_flags & SR_NOTIFY_MCUDISACK) ? + ERRCONFIG_MCUDISACKINTEN : 0; + return val; +} + +static inline u32 notifier_to_irqen_v2(u8 notify_flags) +{ + u32 val; + val = (notify_flags & SR_NOTIFY_MCUACCUM) ? + IRQENABLE_MCUACCUMINT : 0; + val |= (notify_flags & SR_NOTIFY_MCUVALID) ? + IRQENABLE_MCUVALIDINT : 0; + val |= (notify_flags & SR_NOTIFY_MCUBOUND) ? + IRQENABLE_MCUBOUNDSINT : 0; + val |= (notify_flags & SR_NOTIFY_MCUDISACK) ? + IRQENABLE_MCUDISABLEACKINT : 0; + return val; +} + +static inline u8 irqstat_to_notifier_v1(u32 status) +{ + u8 val; + val = (status & ERRCONFIG_MCUACCUMINTST) ? + SR_NOTIFY_MCUACCUM : 0; + val |= (status & ERRCONFIG_MCUVALIDINTEN) ? + SR_NOTIFY_MCUVALID : 0; + val |= (status & ERRCONFIG_MCUBOUNDINTEN) ? + SR_NOTIFY_MCUBOUND : 0; + val |= (status & ERRCONFIG_MCUDISACKINTEN) ? + SR_NOTIFY_MCUDISACK : 0; + return val; +} + +static inline u8 irqstat_to_notifier_v2(u32 status) +{ + u8 val; + val = (status & IRQENABLE_MCUACCUMINT) ? + SR_NOTIFY_MCUACCUM : 0; + val |= (status & IRQENABLE_MCUVALIDINT) ? + SR_NOTIFY_MCUVALID : 0; + val |= (status & IRQENABLE_MCUBOUNDSINT) ? + SR_NOTIFY_MCUBOUND : 0; + val |= (status & IRQENABLE_MCUDISABLEACKINT) ? + SR_NOTIFY_MCUDISACK : 0; + return val; +} + + static irqreturn_t sr_interrupt(int irq, void *data) { struct omap_sr *sr_info = (struct omap_sr *)data; u32 status = 0; + u32 value = 0; if (sr_info->ip_type == SR_TYPE_V1) { + /* Status bits are one bit before enable bits in v1 */ + value = notifier_to_irqen_v1(sr_class->notify_flags) >> 1; + /* Read the status bits */ status = sr_read_reg(sr_info, ERRCONFIG_V1); + status &= value; /* Clear them by writing back */ - sr_write_reg(sr_info, ERRCONFIG_V1, status); + sr_modify_reg(sr_info, ERRCONFIG_V1, value, status); + + value = irqstat_to_notifier_v1(status); } else if (sr_info->ip_type == SR_TYPE_V2) { + value = notifier_to_irqen_v2(sr_class->notify_flags); /* Read the status bits */ - sr_read_reg(sr_info, IRQSTATUS); + status = sr_read_reg(sr_info, IRQSTATUS); + status &= value; /* Clear them by writing back */ sr_write_reg(sr_info, IRQSTATUS, status); + value = irqstat_to_notifier_v2(status); } if (sr_class->notify) - sr_class->notify(sr_info->voltdm, status); + sr_class->notify(sr_info->voltdm, value); return IRQ_HANDLED; } diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h index 8b6ecd9..ff07d1e 100644 --- a/arch/arm/plat-omap/include/plat/smartreflex.h +++ b/arch/arm/plat-omap/include/plat/smartreflex.h @@ -141,6 +141,12 @@ #define OMAP3430_SR_ERRWEIGHT 0x04 #define OMAP3430_SR_ERRMAXLIMIT 0x02 +/* Smart reflex notifiers for class drivers to use */ +#define SR_NOTIFY_MCUACCUM (0x1 << 0) +#define SR_NOTIFY_MCUVALID (0x1 << 1) +#define SR_NOTIFY_MCUBOUND (0x1 << 2) +#define SR_NOTIFY_MCUDISACK (0x1 << 3) + /** * struct omap_sr_pmic_data - Strucutre to be populated by pmic code to pass * pmic specific info to smartreflex driver