From patchwork Tue Mar 1 13:17:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Lei X-Patchwork-Id: 599111 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p21DIIpq014265 for ; Tue, 1 Mar 2011 13:18:37 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753052Ab1CANSg (ORCPT ); Tue, 1 Mar 2011 08:18:36 -0500 Received: from mail-px0-f174.google.com ([209.85.212.174]:34889 "EHLO mail-px0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752559Ab1CANSg (ORCPT ); Tue, 1 Mar 2011 08:18:36 -0500 Received: by pxi15 with SMTP id 15so799735pxi.19 for ; Tue, 01 Mar 2011 05:18:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=v2Ih4xSo6MXdLV7NDMLIxHbK2/HoZTZuyj7Y3/fGZgI=; b=thkNmu3f2Qvxx7vHtymsGiFw6zNmFASm0LR2ZNzLE/QPl+fa3o+JUwecgbVIdSlHgh WwolCCNF3g0adZ4yVnvgMm2tT8MOf16J1d+zJ18EfChRkqg0+fsbsZ7pFTRdGnvZIRXT yq3aXflIrlYWy9UeeYAtg0sAzH1Ngb9hVYXDk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=m5yij8nfhQs/+fPzHpbOmY6ddfkgd3YsuFlHcjYYaKmVV5V2gGkc0cG6JfPCJXShOW hR53AMon5v2w1D2HSj2bnkYf8UdoTxwX3bRotoAgiQWnExSYXVslnWW3DvqEru9nLFl0 z8sNCjwAuCkZuOkDXZSnAS5VUzvJrm7Kc30KQ= Received: by 10.142.120.2 with SMTP id s2mr1568887wfc.40.1298985515679; Tue, 01 Mar 2011 05:18:35 -0800 (PST) Received: from localhost ([183.37.207.101]) by mx.google.com with ESMTPS id z1sm7483838wfd.21.2011.03.01.05.18.29 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 01 Mar 2011 05:18:34 -0800 (PST) From: tom.leiming@gmail.com To: linux@arm.linux.org.uk Cc: linux-arm-kernel@lists.infradead.org, Ming Lei , Woodruff Richard , Tony Lindgren , linux-omap@vger.kernel.org Subject: [PATCH 3/3] arm: omap4: support pmu Date: Tue, 1 Mar 2011 21:17:14 +0800 Message-Id: <1298985434-3009-4-git-send-email-tom.leiming@gmail.com> X-Mailer: git-send-email 1.7.3 In-Reply-To: <1298985434-3009-1-git-send-email-tom.leiming@gmail.com> References: <1298985434-3009-1-git-send-email-tom.leiming@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 13:18:37 +0000 (UTC) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 71f099b..54e9705 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -34,6 +34,7 @@ #include "mux.h" #include "control.h" +#include "dbg44xx.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) @@ -347,19 +348,70 @@ static struct resource omap3_pmu_resource = { .flags = IORESOURCE_IRQ, }; +static struct resource omap4_pmu_resource[] = { + { + .start = OMAP44XX_IRQ_CTI0, + .end = OMAP44XX_IRQ_CTI0, + .flags = IORESOURCE_IRQ, + }, + { + .start = OMAP44XX_IRQ_CTI1, + .end = OMAP44XX_IRQ_CTI1, + .flags = IORESOURCE_IRQ, + } +}; + static struct platform_device omap_pmu_device = { .name = "arm-pmu", .id = ARM_PMU_DEVICE_CPU, .num_resources = 1, }; +struct pmu_platform_data omap4_pmu_data; + +static void omap4_configure_pmu_irq(void) +{ + void *base0; + void *base1; + + base0 = ioremap(OMAP4430_CTI0_BASE, 4096); + base1 = ioremap(OMAP4430_CTI1_BASE, 4096); + if (!base0 && !base1) { + pr_err("ioremap for omap4 CTI failed\n"); + return; + } + + /*configure CTI0 for pmu irq routing*/ + cti_init(&omap4_pmu_data.cti[0], base0, + OMAP44XX_IRQ_CTI0, 6); + cti_unlock(&omap4_pmu_data.cti[0]); + cti_map_trigger(&omap4_pmu_data.cti[0], + 1, 6, 2); + + /*configure CTI1 for pmu irq routing*/ + cti_init(&omap4_pmu_data.cti[1], base1, + OMAP44XX_IRQ_CTI1, 6); + cti_unlock(&omap4_pmu_data.cti[1]); + cti_map_trigger(&omap4_pmu_data.cti[1], + 1, 6, 3); + + omap4_pmu_data.cti_cnt = 2; + omap4_pmu_data.use_cti_irq = 1; +} + static void omap_init_pmu(void) { if (cpu_is_omap24xx()) omap_pmu_device.resource = &omap2_pmu_resource; else if (cpu_is_omap34xx()) omap_pmu_device.resource = &omap3_pmu_resource; - else + else if (cpu_is_omap44xx()) { + omap_pmu_device.resource = omap4_pmu_resource; + omap_pmu_device.num_resources = 2; + omap_pmu_device.dev.platform_data = &omap4_pmu_data; + + omap4_configure_pmu_irq(); + } else return; platform_device_register(&omap_pmu_device);