@@ -1224,6 +1224,11 @@ void dispc_enable_zorder(enum omap_plane plane, bool enable)
dispc_write_reg(dispc_reg_att[plane], val);
}
+void dispc_enable_gamma_table(bool enable)
+{
+ REG_FLD_MOD(DISPC_CONFIG, enable, 9, 9);
+}
+
static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable)
{
u32 val;
@@ -559,6 +559,11 @@ void dss_set_dac_pwrdn_bgz(bool enable)
REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */
}
+void dss_select_hdmi_venc(enum dss_hdmi_venc_select hdmi)
+{
+ REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* 0x1 for HDMI, 0x0 VENC */
+}
+
static int dss_init(bool skip_init)
{
int r;
@@ -123,6 +123,11 @@ enum dss_clk_source {
DSS_SRC_DSS1_ALWON_FCLK,
};
+enum dss_hdmi_venc_select {
+ DSS_VENC_SELECT, /* Select VENC */
+ DSS_HDMI_SELECT, /* Select HDMI */
+};
+
struct dss_clock_info {
/* rates that we get with dividers below */
unsigned long fck;
@@ -209,6 +214,7 @@ void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
int dss_init_platform_driver(void);
void dss_uninit_platform_driver(void);
+void dss_select_hdmi_venc(enum dss_hdmi_venc_select hdmi);
void dss_save_context(void);
void dss_restore_context(void);
void dss_clk_enable(enum dss_clock clks);
@@ -352,6 +358,7 @@ void dispc_set_plane_pos(enum omap_plane plane, u16 x, u16 y);
void dispc_set_plane_size(enum omap_plane plane, u16 width, u16 height);
void dispc_set_channel_out(enum omap_plane plane,
enum omap_channel channel_out);
+void dispc_enable_gamma_table(bool enable);
int dispc_setup_plane(enum omap_plane plane,
u32 paddr, u16 screen_width,