From patchwork Tue Mar 1 15:15:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 599501 X-Patchwork-Delegate: me@felipebalbi.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p21FGja2021748 for ; Tue, 1 Mar 2011 15:16:46 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756649Ab1CAPQm (ORCPT ); Tue, 1 Mar 2011 10:16:42 -0500 Received: from na3sys009aog110.obsmtp.com ([74.125.149.203]:37981 "EHLO na3sys009aog110.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756643Ab1CAPQl (ORCPT ); Tue, 1 Mar 2011 10:16:41 -0500 Received: from source ([209.85.214.44]) (using TLSv1) by na3sys009aob110.postini.com ([74.125.148.12]) with SMTP ID DSNKTW0Ny4R+adqe9hAxBImHPxZ0z3Y1p2iP@postini.com; Tue, 01 Mar 2011 07:16:40 PST Received: by mail-bw0-f44.google.com with SMTP id 13so4696724bwz.3 for ; Tue, 01 Mar 2011 07:16:27 -0800 (PST) Received: by 10.204.34.142 with SMTP id l14mr1393790bkd.152.1298992587378; Tue, 01 Mar 2011 07:16:27 -0800 (PST) Received: from localhost (cs181221087.pp.htv.fi [82.181.221.87]) by mx.google.com with ESMTPS id z18sm3416327bkf.8.2011.03.01.07.16.26 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 01 Mar 2011 07:16:26 -0800 (PST) From: Felipe Balbi To: Greg KH Cc: Linux USB Mailing List , Linux OMAP Mailing List , Anand Gadiyar , Greg Kroah-Hartman , Felipe Balbi Subject: [patch-v2.6.39 09/19] usb: ehci: omap: add support for TLL mode on OMAP4 Date: Tue, 1 Mar 2011 17:15:30 +0200 Message-Id: <1298992540-5984-10-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.7.4.rc2 In-Reply-To: <1298992540-5984-1-git-send-email-balbi@ti.com> References: <1298992540-5984-1-git-send-email-balbi@ti.com> Organization: Texas Instruments\n Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 15:16:46 +0000 (UTC) diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index f784ceb..d7e223b 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -195,7 +195,11 @@ struct ehci_hcd_omap { struct clk *xclk60mhsp1_ck; struct clk *xclk60mhsp2_ck; struct clk *utmi_p1_fck; + struct clk *usbhost_p1_fck; + struct clk *usbtll_p1_fck; struct clk *utmi_p2_fck; + struct clk *usbhost_p2_fck; + struct clk *usbtll_p2_fck; /* FIXME the following two workarounds are * board specific not silicon-specific so these @@ -410,6 +414,50 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp1_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp1_ck)) { + ret = PTR_ERR(omap->xclk60mhsp1_ck); + dev_err(omap->dev, + "Unable to get Port1 ULPI clock\n"); + } + + omap->utmi_p1_fck = clk_get(omap->dev, + "utmi_p1_gfclk"); + if (IS_ERR(omap->utmi_p1_fck)) { + ret = PTR_ERR(omap->utmi_p1_fck); + dev_err(omap->dev, + "Unable to get utmi_p1_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p1_fck, + omap->xclk60mhsp1_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P1 f-clock\n"); + } + + omap->usbhost_p1_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p1_clk"); + if (IS_ERR(omap->usbhost_p1_fck)) { + ret = PTR_ERR(omap->usbhost_p1_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 1 clk\n"); + } else { + clk_enable(omap->usbhost_p1_fck); + } + + omap->usbtll_p1_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch0_clk"); + + if (IS_ERR(omap->usbtll_p1_fck)) { + ret = PTR_ERR(omap->usbtll_p1_fck); + dev_err(omap->dev, + "Unable to get TLL CH0 clk\n"); + } else { + clk_enable(omap->usbtll_p1_fck); + } + break; /* TODO */ default: break; @@ -440,6 +488,50 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp2_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp2_ck)) { + ret = PTR_ERR(omap->xclk60mhsp2_ck); + dev_err(omap->dev, + "Unable to get Port2 ULPI clock\n"); + } + + omap->utmi_p2_fck = clk_get(omap->dev, + "utmi_p2_gfclk"); + if (IS_ERR(omap->utmi_p2_fck)) { + ret = PTR_ERR(omap->utmi_p2_fck); + dev_err(omap->dev, + "Unable to get utmi_p2_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p2_fck, + omap->xclk60mhsp2_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P2 f-clock\n"); + } + + omap->usbhost_p2_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p2_clk"); + if (IS_ERR(omap->usbhost_p2_fck)) { + ret = PTR_ERR(omap->usbhost_p2_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 2 clk\n"); + } else { + clk_enable(omap->usbhost_p2_fck); + } + + omap->usbtll_p2_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch1_clk"); + + if (IS_ERR(omap->usbtll_p2_fck)) { + ret = PTR_ERR(omap->usbtll_p2_fck); + dev_err(omap->dev, + "Unable to get TLL CH1 clk\n"); + } else { + clk_enable(omap->usbtll_p2_fck); + } + break; /* TODO */ default: break; @@ -602,6 +694,24 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) return 0; err_sys_status: + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + } + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + } + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + } + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + } + clk_disable(omap->utmi_p2_fck); clk_put(omap->utmi_p2_fck); clk_disable(omap->xclk60mhsp2_ck); @@ -740,6 +850,30 @@ static void omap_stop_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) clk_put(omap->utmi_p2_fck); omap->utmi_p2_fck = NULL; } + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + omap->usbtll_p2_fck = NULL; + } + + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + omap->usbhost_p2_fck = NULL; + } + + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + omap->usbtll_p1_fck = NULL; + } + + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + omap->usbhost_p1_fck = NULL; + } } if (omap->phy_reset) {