From patchwork Tue Mar 1 16:58:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Lei X-Patchwork-Id: 599931 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p21GxL7X015682 for ; Tue, 1 Mar 2011 16:59:21 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754063Ab1CAQ7U (ORCPT ); Tue, 1 Mar 2011 11:59:20 -0500 Received: from mail-pz0-f46.google.com ([209.85.210.46]:61743 "EHLO mail-pz0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752466Ab1CAQ7T (ORCPT ); Tue, 1 Mar 2011 11:59:19 -0500 Received: by pzk35 with SMTP id 35so831401pzk.19 for ; Tue, 01 Mar 2011 08:59:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=UHITVwACu/NGld4JUEX0rro8oHJIFbq6pzLWxsXx79Y=; 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Tue, 01 Mar 2011 16:59:21 +0000 (UTC) diff --git a/arch/arm/mach-omap2/dbg44xx.h b/arch/arm/mach-omap2/dbg44xx.h new file mode 100644 index 0000000..e447ad5 --- /dev/null +++ b/arch/arm/mach-omap2/dbg44xx.h @@ -0,0 +1,18 @@ +/* + * OMAP44xx on-chip debug support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX", + * or "OMAP4430". + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_DBG44XX_H +#define __ARCH_ARM_MACH_OMAP2_DBG44XX_H + +#define OMAP44XX_CTI0_BASE 0x54148000 +#define OMAP44XX_CTI1_BASE 0x54149000 + +#endif diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index d216976..0420a58 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -35,6 +35,7 @@ #include "mux.h" #include "control.h" +#include "dbg44xx.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) @@ -322,19 +323,71 @@ static struct resource omap3_pmu_resource = { .flags = IORESOURCE_IRQ, }; +static struct resource omap4_pmu_resource[] = { + { + .start = OMAP44XX_IRQ_CTI0, + .end = OMAP44XX_IRQ_CTI0, + .flags = IORESOURCE_IRQ, + }, + { + .start = OMAP44XX_IRQ_CTI1, + .end = OMAP44XX_IRQ_CTI1, + .flags = IORESOURCE_IRQ, + } +}; + static struct platform_device omap_pmu_device = { .name = "arm-pmu", .id = ARM_PMU_DEVICE_CPU, .num_resources = 1, }; +struct arm_pmu_platdata omap4_pmu_data; + +static void omap4_configure_pmu_irq(void) +{ + void *base0; + void *base1; + + base0 = ioremap(OMAP44XX_CTI0_BASE, 4096); + base1 = ioremap(OMAP44XX_CTI1_BASE, 4096); + if (!base0 && !base1) { + pr_err("ioremap for omap4 CTI failed\n"); + return; + } + + /*configure CTI0 for pmu irq routing*/ + cti_init(&omap4_pmu_data.cti[0], base0, + OMAP44XX_IRQ_CTI0, 6); + cti_unlock(&omap4_pmu_data.cti[0]); + cti_map_trigger(&omap4_pmu_data.cti[0], + 1, 6, 2); + + /*configure CTI1 for pmu irq routing*/ + cti_init(&omap4_pmu_data.cti[1], base1, + OMAP44XX_IRQ_CTI1, 6); + cti_unlock(&omap4_pmu_data.cti[1]); + cti_map_trigger(&omap4_pmu_data.cti[1], + 1, 6, 3); + + omap4_pmu_data.cti_cnt = 2; + omap4_pmu_data.use_cti_irq = 1; + omap4_pmu_data.handle_irq = NULL; +} + static void omap_init_pmu(void) { if (cpu_is_omap24xx()) omap_pmu_device.resource = &omap2_pmu_resource; else if (cpu_is_omap34xx()) omap_pmu_device.resource = &omap3_pmu_resource; - else + else if (cpu_is_omap44xx()) { + omap_pmu_device.resource = omap4_pmu_resource; + omap_pmu_device.num_resources = 2; + platform_set_drvdata(&omap_pmu_device, &omap4_pmu_data); + + omap4_configure_pmu_irq(); + } else return; platform_device_register(&omap_pmu_device);