From patchwork Tue Mar 1 19:46:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Guzman Lugo, Fernando" X-Patchwork-Id: 600811 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p21JlUDs010748 for ; Tue, 1 Mar 2011 19:47:30 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757206Ab1CATqt (ORCPT ); Tue, 1 Mar 2011 14:46:49 -0500 Received: from na3sys009aog113.obsmtp.com ([74.125.149.209]:45044 "EHLO na3sys009aog113.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757195Ab1CATqt (ORCPT ); Tue, 1 Mar 2011 14:46:49 -0500 Received: from source ([209.85.160.172]) (using TLSv1) by na3sys009aob113.postini.com ([74.125.148.12]) with SMTP ID DSNKTW1NJxMmNvaqh8i72hH9xPvFZ5iKrXpa@postini.com; Tue, 01 Mar 2011 11:46:48 PST Received: by mail-gy0-f172.google.com with SMTP id 15so2971401gyc.17 for ; Tue, 01 Mar 2011 11:46:47 -0800 (PST) Received: by 10.236.110.168 with SMTP id u28mr4535241yhg.35.1299008807734; Tue, 01 Mar 2011 11:46:47 -0800 (PST) Received: from localhost.localdomain (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id 68sm3194839yhl.19.2011.03.01.11.46.46 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 01 Mar 2011 11:46:46 -0800 (PST) From: Fernando Guzman Lugo To: Cc: , , linux-omap@vger.kernel.org, , , Ramesh Gupta , Hari Kanigeri Subject: [PATCH] omap:iommu-added cache flushing operation for L2 cache Date: Tue, 1 Mar 2011 13:46:32 -0600 Message-Id: <1299008793-27428-1-git-send-email-fernando.lugo@ti.com> X-Mailer: git-send-email 1.7.0.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 19:47:30 +0000 (UTC) diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index e3eb038..aeb2c33 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c @@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device); */ static void flush_iopgd_range(u32 *first, u32 *last) { - /* FIXME: L2 cache should be taken care of if it exists */ - do { - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd" - : : "r" (first)); - first += L1_CACHE_BYTES / sizeof(*first); - } while (first <= last); + dmac_flush_range(first, last); + outer_flush_range(virt_to_phys(first), virt_to_phys(last)); } + static void flush_iopte_range(u32 *first, u32 *last) { - /* FIXME: L2 cache should be taken care of if it exists */ - do { - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte" - : : "r" (first)); - first += L1_CACHE_BYTES / sizeof(*first); - } while (first <= last); + dmac_flush_range(first, last); + outer_flush_range(virt_to_phys(first), virt_to_phys(last)); } static void iopte_free(u32 *iopte) @@ -750,7 +743,7 @@ size_t iopgtable_clear_entry(struct iommu *obj, u32 da) } EXPORT_SYMBOL_GPL(iopgtable_clear_entry); -static void iopgtable_clear_entry_all(struct iommu *obj) +void iopgtable_clear_entry_all(struct iommu *obj) { int i; @@ -777,7 +770,7 @@ static void iopgtable_clear_entry_all(struct iommu *obj) spin_unlock(&obj->page_table_lock); } - +EXPORT_SYMBOL_GPL(iopgtable_clear_entry_all); /* * Device IOMMU generic operations */ @@ -1068,6 +1061,7 @@ static void iopte_cachep_ctor(void *iopte) clean_dcache_area(iopte, IOPTE_TABLE_SIZE); } + static int __init omap_iommu_init(void) { struct kmem_cache *p;