From patchwork Wed Mar 2 10:55:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 602641 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p22AttKk008161 for ; Wed, 2 Mar 2011 10:55:55 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757006Ab1CBKzw (ORCPT ); Wed, 2 Mar 2011 05:55:52 -0500 Received: from na3sys009aog115.obsmtp.com ([74.125.149.238]:45757 "EHLO na3sys009aog115.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757055Ab1CBKzv (ORCPT ); Wed, 2 Mar 2011 05:55:51 -0500 Received: from source ([209.85.218.48]) (using TLSv1) by na3sys009aob115.postini.com ([74.125.148.12]) with SMTP ID DSNKTW4iNg1r/SNDKsl3EvZNoYmIH61nlj7n@postini.com; Wed, 02 Mar 2011 02:55:51 PST Received: by yia25 with SMTP id 25so3214097yia.7 for ; Wed, 02 Mar 2011 02:55:49 -0800 (PST) Received: by 10.151.84.18 with SMTP id m18mr10698462ybl.114.1299063349750; Wed, 02 Mar 2011 02:55:49 -0800 (PST) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id f2sm22307ybh.7.2011.03.02.02.55.45 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 02 Mar 2011 02:55:48 -0800 (PST) From: Nishanth Menon To: linux-omap Cc: Kevin H , Tony L , linux-arm , Nishanth Menon Subject: [PATCH v2 01/18] omap3: hwmod: add smartreflex irqs Date: Wed, 2 Mar 2011 16:25:14 +0530 Message-Id: <1299063331-27968-2-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1299063331-27968-1-git-send-email-nm@ti.com> References: <1299063331-27968-1-git-send-email-nm@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 02 Mar 2011 10:55:55 +0000 (UTC) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 8d81813..ea1f49a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -265,6 +265,15 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; + +static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { + {.name = "sr1_irq", .irq = 18}, +}; + +static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { + {.name = "sr2_irq", .irq = 19}, +}; + /* L4 CORE -> SR1 interface */ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { { @@ -1289,6 +1298,8 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { CHIP_IS_OMAP3430ES3_0 | CHIP_IS_OMAP3430ES3_1), .flags = HWMOD_SET_DEFAULT_CLOCKACT, + .mpu_irqs = omap3_smartreflex_mpu_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3_smartreflex_mpu_irqs), }; static struct omap_hwmod omap36xx_sr1_hwmod = { @@ -1308,6 +1319,8 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), + .mpu_irqs = omap3_smartreflex_mpu_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3_smartreflex_mpu_irqs), }; /* SR2 */ @@ -1335,6 +1348,8 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { CHIP_IS_OMAP3430ES3_0 | CHIP_IS_OMAP3430ES3_1), .flags = HWMOD_SET_DEFAULT_CLOCKACT, + .mpu_irqs = omap3_smartreflex_core_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3_smartreflex_core_irqs), }; static struct omap_hwmod omap36xx_sr2_hwmod = { @@ -1354,6 +1369,8 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), + .mpu_irqs = omap3_smartreflex_core_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3_smartreflex_core_irqs), }; static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {