From patchwork Thu Mar 3 10:25:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 605801 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p23AQCq4018814 for ; Thu, 3 Mar 2011 10:26:12 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757085Ab1CCK0E (ORCPT ); Thu, 3 Mar 2011 05:26:04 -0500 Received: from mail-wy0-f174.google.com ([74.125.82.174]:54585 "EHLO mail-wy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758017Ab1CCK0D (ORCPT ); Thu, 3 Mar 2011 05:26:03 -0500 Received: by wyg36 with SMTP id 36so887221wyg.19 for ; Thu, 03 Mar 2011 02:26:02 -0800 (PST) Received: by 10.227.152.197 with SMTP id h5mr734522wbw.78.1299147961536; Thu, 03 Mar 2011 02:26:01 -0800 (PST) Received: from localhost.localdomain (235.218-245-81.adsl-dyn.isp.belgacom.be [81.245.218.235]) by mx.google.com with ESMTPS id r6sm490817weq.44.2011.03.03.02.25.58 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 03 Mar 2011 02:25:59 -0800 (PST) From: Jean Pihet To: Thomas Renninger , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kevin Hilman Cc: Jean Pihet Subject: [PATCH] perf: add OMAP support for the new power events Date: Thu, 3 Mar 2011 11:25:43 +0100 Message-Id: <1299147943-2929-1-git-send-email-j-pihet@ti.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1298052645-4164-1-git-send-email-j-pihet@ti.com> References: <1298052645-4164-1-git-send-email-j-pihet@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 03 Mar 2011 10:26:26 +0000 (UTC) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 46d03cc..180299e 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -22,7 +22,9 @@ #include #include #include +#include +#include #include #include "clockdomain.h" #include @@ -261,8 +263,10 @@ void omap2_clk_disable(struct clk *clk) pr_debug("clock: %s: disabling in hardware\n", clk->name); - if (clk->ops && clk->ops->disable) + if (clk->ops && clk->ops->disable) { + trace_clock_disable(clk->name, 0, smp_processor_id()); clk->ops->disable(clk); + } if (clk->clkdm) clkdm_clk_disable(clk->clkdm, clk); @@ -314,6 +318,7 @@ int omap2_clk_enable(struct clk *clk) } if (clk->ops && clk->ops->enable) { + trace_clock_enable(clk->name, 1, smp_processor_id()); ret = clk->ops->enable(clk); if (ret) { WARN(1, "clock: %s: could not enable: %d\n", @@ -353,8 +358,10 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ - if (clk->set_rate) + if (clk->set_rate) { + trace_clock_set_rate(clk->name, rate, smp_processor_id()); ret = clk->set_rate(clk, rate); + } return ret; } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index bd610bc..d46b9ff 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include "clockdomain.h" @@ -514,8 +515,14 @@ static void omap3_pm_idle(void) if (omap_irq_pending() || need_resched()) goto out; + trace_power_start(POWER_CSTATE, 1, smp_processor_id()); + trace_cpu_idle(1, smp_processor_id()); + omap_sram_idle(); + trace_power_end(smp_processor_id()); + trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id()); + out: local_fiq_enable(); local_irq_enable(); diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index eaed0df..1495eed 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -19,12 +19,15 @@ #include #include #include +#include + #include "cm2xxx_3xxx.h" #include "prcm44xx.h" #include "cm44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include #include #include "powerdomain.h" #include "clockdomain.h" @@ -32,6 +35,8 @@ #include "pm.h" +#define PWRDM_TRACE_STATES_FLAG (1<<31) + enum { PWRDM_STATE_NOW = 0, PWRDM_STATE_PREV, @@ -130,8 +135,7 @@ static void _update_logic_membank_counters(struct powerdomain *pwrdm) static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) { - int prev; - int state; + int prev, state, trace_state = 0; if (pwrdm == NULL) return -EINVAL; @@ -148,6 +152,17 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) pwrdm->state_counter[prev]++; if (prev == PWRDM_POWER_RET) _update_logic_membank_counters(pwrdm); + /* + * If the power domain did not hit the desired state, + * generate a trace event with both the desired and hit states + */ + if (state != prev) { + trace_state = (PWRDM_TRACE_STATES_FLAG | + ((state & OMAP_POWERSTATE_MASK) << 8) | + ((prev & OMAP_POWERSTATE_MASK) << 0)); + trace_power_domain_target(pwrdm->name, trace_state, + smp_processor_id()); + } break; default: return -EINVAL; @@ -406,8 +421,13 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) pr_debug("powerdomain: setting next powerstate for %s to %0x\n", pwrdm->name, pwrst); - if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) + if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { + /* Trace the pwrdm desired target state */ + trace_power_domain_target(pwrdm->name, pwrst, + smp_processor_id()); + /* Program the pwrdm desired target state */ ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst); + } return ret; }