From patchwork Sat Mar 5 15:29:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 612451 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p25FW3F2025197 for ; Sat, 5 Mar 2011 15:32:03 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753161Ab1CEPcC (ORCPT ); Sat, 5 Mar 2011 10:32:02 -0500 Received: from na3sys009aog105.obsmtp.com ([74.125.149.75]:42429 "EHLO na3sys009aog105.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751466Ab1CEPcB (ORCPT ); Sat, 5 Mar 2011 10:32:01 -0500 Received: from source ([209.85.218.48]) (using TLSv1) by na3sys009aob105.postini.com ([74.125.148.12]) with SMTP ID DSNKTXJXcKn16e0ZGibLSPM3vPwHTqP/YuWG@postini.com; Sat, 05 Mar 2011 07:32:00 PST Received: by yia25 with SMTP id 25so1560251yia.35 for ; Sat, 05 Mar 2011 07:32:00 -0800 (PST) Received: by 10.236.102.161 with SMTP id d21mr1848yhg.49.1299339119975; Sat, 05 Mar 2011 07:31:59 -0800 (PST) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id 23sm376729yhl.23.2011.03.05.07.31.55 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 05 Mar 2011 07:31:59 -0800 (PST) From: Nishanth Menon To: linux-omap Cc: linux-arm , Kevin Hilman , Tony , Paul , Nishanth Menon Subject: [PATCH V3 15/19] OMAP3+: SR: introduce notifier_control Date: Sat, 5 Mar 2011 20:59:18 +0530 Message-Id: <1299338962-5602-16-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1299338962-5602-1-git-send-email-nm@ti.com> References: <1299338962-5602-1-git-send-email-nm@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Sat, 05 Mar 2011 15:32:03 +0000 (UTC) diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 21944e2..f6e44a1 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -712,6 +712,63 @@ void sr_disable(struct voltagedomain *voltdm) } /** + * sr_notifier_control() - control the notifier mechanism + * @voltdm: VDD pointer to which the SR module to be configured belongs to. + * @enable: true to enable notifiers and false to disable the same + * + * SR modules allow an MCU interrupt mechanism that vary based on the IP + * revision, we allow the system to generate interrupt if the class driver + * has capability to handle the same. it is upto the class driver to ensure + * the proper sequencing and handling for a clean implementation. returns + * 0 if all goes fine, else returns failure results + */ +int sr_notifier_control(struct voltagedomain *voltdm, bool enable) +{ + struct omap_sr *sr = _sr_lookup(voltdm); + u32 value = 0; + if (IS_ERR_OR_NULL(sr)) { + pr_warning("%s: sr corresponding to domain not found\n", + __func__); + return -EINVAL; + } + if (!sr->autocomp_active) + return -EINVAL; + + /* if I could never register an isr, why bother?? */ + if (!(sr_class && sr_class->notify && sr_class->notify_flags && + sr->irq)) { + dev_warn(&sr->pdev->dev, + "%s: unable to setup irq without handling mechanism\n", + __func__); + return -EINVAL; + } + + switch (sr->ip_type) { + case SR_TYPE_V1: + value = notifier_to_irqen_v1(sr_class->notify_flags); + sr_modify_reg(sr, ERRCONFIG_V1, value, + (enable) ? value : 0); + break; + case SR_TYPE_V2: + value = notifier_to_irqen_v2(sr_class->notify_flags); + sr_write_reg(sr, (enable) ? IRQENABLE_SET : IRQENABLE_CLR, + value); + break; + default: + dev_warn(&sr->pdev->dev, "%s: unknown type of sr??\n", + __func__); + return -EINVAL; + } + + if (enable) + enable_irq(sr->irq); + else + disable_irq_nosync(sr->irq); + + return 0; +} + +/** * sr_register_class() - API to register a smartreflex class parameters. * @class_data: The structure containing various sr class specific data. * diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h index 2976bf6..4a1ada4 100644 --- a/arch/arm/mach-omap2/smartreflex.h +++ b/arch/arm/mach-omap2/smartreflex.h @@ -242,6 +242,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data); /* Smartreflex driver hooks to be called from Smartreflex class driver */ int sr_enable(struct voltagedomain *voltdm, unsigned long volt); void sr_disable(struct voltagedomain *voltdm); +int sr_notifier_control(struct voltagedomain *voltdm, bool enable); int sr_configure_errgen(struct voltagedomain *voltdm); int sr_configure_minmax(struct voltagedomain *voltdm); @@ -250,6 +251,13 @@ int sr_register_class(struct omap_sr_class_data *class_data); #else static inline void omap_sr_enable(struct voltagedomain *voltdm) {} static inline void omap_sr_disable(struct voltagedomain *voltdm) {} + +static inline int sr_notifier_control(struct voltagedomain *voltdm, + bool enable) +{ + return -EINVAL; +} + static inline void omap_sr_disable_reset_volt( struct voltagedomain *voltdm) {} static inline void omap_sr_register_pmic(