@@ -289,6 +289,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
if (cpu)
goto cpu_prepare;
+ pwrdm_pre_transition();
+
/*
* Check MPUSS next state and save GIC if needed
* GIC lost during MPU OFF and OSWR
@@ -334,6 +336,8 @@ cpu_prepare:
gic_dist_enable();
}
+ pwrdm_post_transition();
+
ret:
return 0;
}
@@ -606,9 +606,11 @@ static int __init pm_dbg_init(void)
if (pm_dbg_init_done)
return 0;
- if (cpu_is_omap34xx())
+ if (cpu_is_omap34xx()) {
pm_dbg_reg_modules = omap3_pm_reg_modules;
- else {
+ } else if (cpu_is_omap44xx()) {
+ /* Allow pm_dbg_init on OMAP4. */
+ } else {
printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
return -ENODEV;
}
@@ -624,6 +626,9 @@ static int __init pm_dbg_init(void)
pwrdm_for_each(pwrdms_setup, (void *)d);
+ if (cpu_is_omap44xx())
+ goto skip_reg_debufs;
+
pm_dbg_dir = debugfs_create_dir("registers", d);
if (IS_ERR(pm_dbg_dir))
return PTR_ERR(pm_dbg_dir);
@@ -638,6 +643,7 @@ static int __init pm_dbg_init(void)
pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
}
+skip_reg_debufs:
(void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
&enable_off_mode, &pm_dbg_option_fops);
@@ -41,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+ wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, &pwrst_list, node) {
pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);