From patchwork Thu Mar 31 10:10:58 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 678811 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2VABSiI027259 for ; Thu, 31 Mar 2011 10:11:28 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933017Ab1CaKL1 (ORCPT ); Thu, 31 Mar 2011 06:11:27 -0400 Received: from na3sys009aog112.obsmtp.com ([74.125.149.207]:51081 "EHLO na3sys009aog112.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751614Ab1CaKL0 (ORCPT ); Thu, 31 Mar 2011 06:11:26 -0400 Received: from source ([74.125.82.52]) (using TLSv1) by na3sys009aob112.postini.com ([74.125.148.12]) with SMTP ID DSNKTZRTTbh0T4++X27oB2mwH4aBL8pyaFJq@postini.com; Thu, 31 Mar 2011 03:11:26 PDT Received: by wwe15 with SMTP id 15so2347159wwe.21 for ; Thu, 31 Mar 2011 03:11:23 -0700 (PDT) Received: by 10.216.240.3 with SMTP id d3mr1925178wer.51.1301566283578; Thu, 31 Mar 2011 03:11:23 -0700 (PDT) Received: from deskari (a62-248-146-119.elisa-laajakaista.fi [62.248.146.119]) by mx.google.com with ESMTPS id d6sm429627wer.26.2011.03.31.03.11.21 (version=SSLv3 cipher=OTHER); Thu, 31 Mar 2011 03:11:22 -0700 (PDT) From: Tomi Valkeinen To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org Cc: Tomi Valkeinen Subject: [PATCH 1/9] OMAP: DSS2: move dss device clock configuration Date: Thu, 31 Mar 2011 13:10:58 +0300 Message-Id: <1301566266-11187-2-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301566266-11187-1-git-send-email-tomi.valkeinen@ti.com> References: <1301566266-11187-1-git-send-email-tomi.valkeinen@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 31 Mar 2011 10:11:29 +0000 (UTC) diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 05288c9..626b16b 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -766,17 +766,21 @@ static struct omap_dss_device sdp4430_lcd_device = { .data1_pol = 0, .data2_lane = 3, .data2_pol = 0, - .div = { + }, + + .clocks = { + .dispc = { + .lck_div = 1, /* Logic Clock = 172.8 MHz */ + .pck_div = 5, /* Pixel Clock = 34.56 MHz */ + }, + + .dsi = { .regn = 16, /* Fint = 2.4 MHz */ .regm = 180, /* DDR Clock = 216 MHz */ .regm_dispc = 5, /* PLL1_CLK1 = 172.8 MHz */ .regm_dsi = 5, /* PLL1_CLK2 = 172.8 MHz */ .lp_clk_div = 10, /* LP Clock = 8.64 MHz */ - - .lck_div = 1, /* Logic Clock = 172.8 MHz */ - .pck_div = 5, /* Pixel Clock = 34.56 MHz */ - }, }, .channel = OMAP_DSS_CHANNEL_LCD, diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h index 5e04ddc..e10cfe2 100644 --- a/arch/arm/plat-omap/include/plat/display.h +++ b/arch/arm/plat-omap/include/plat/display.h @@ -401,18 +401,6 @@ struct omap_dss_device { u8 data2_lane; u8 data2_pol; - struct { - u16 regn; - u16 regm; - u16 regm_dispc; - u16 regm_dsi; - - u16 lp_clk_div; - - u16 lck_div; - u16 pck_div; - } div; - bool ext_te; u8 ext_te_gpio; } dsi; @@ -424,6 +412,22 @@ struct omap_dss_device { } phy; struct { + struct { + u16 lck_div; + u16 pck_div; + } dispc; + + struct { + u16 regn; + u16 regm; + u16 regm_dispc; + u16 regm_dsi; + + u16 lp_clk_div; + } dsi; + } clocks; + + struct { struct omap_video_timings timings; int acbi; /* ac-bias pin transitions per interrupt */ diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 23d9bbe..7304c87 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1026,7 +1026,7 @@ static int dsi_set_lp_clk_divisor(struct omap_dss_device *dssdev) unsigned lp_clk_div; unsigned long lp_clk; - lp_clk_div = dssdev->phy.dsi.div.lp_clk_div; + lp_clk_div = dssdev->clocks.dsi.lp_clk_div; if (lp_clk_div == 0 || lp_clk_div > dsi.lpdiv_max) return -EINVAL; @@ -3388,10 +3388,10 @@ static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev) /* we always use DSS_CLK_SYSCK as input clock */ cinfo.use_sys_clk = true; - cinfo.regn = dssdev->phy.dsi.div.regn; - cinfo.regm = dssdev->phy.dsi.div.regm; - cinfo.regm_dispc = dssdev->phy.dsi.div.regm_dispc; - cinfo.regm_dsi = dssdev->phy.dsi.div.regm_dsi; + cinfo.regn = dssdev->clocks.dsi.regn; + cinfo.regm = dssdev->clocks.dsi.regm; + cinfo.regm_dispc = dssdev->clocks.dsi.regm_dispc; + cinfo.regm_dsi = dssdev->clocks.dsi.regm_dsi; r = dsi_calc_clock_rates(dssdev, &cinfo); if (r) { DSSERR("Failed to calc dsi clocks\n"); @@ -3415,8 +3415,8 @@ static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev) fck = dsi_get_pll_hsdiv_dispc_rate(); - dispc_cinfo.lck_div = dssdev->phy.dsi.div.lck_div; - dispc_cinfo.pck_div = dssdev->phy.dsi.div.pck_div; + dispc_cinfo.lck_div = dssdev->clocks.dispc.lck_div; + dispc_cinfo.pck_div = dssdev->clocks.dispc.pck_div; r = dispc_calc_clock_rates(fck, &dispc_cinfo); if (r) {