From patchwork Fri Apr 22 23:01:53 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 728591 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3MN0GIi023013 for ; Fri, 22 Apr 2011 23:00:18 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754902Ab1DVXAH (ORCPT ); Fri, 22 Apr 2011 19:00:07 -0400 Received: from na3sys009aog104.obsmtp.com ([74.125.149.73]:50740 "EHLO na3sys009aog104.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754333Ab1DVXAE (ORCPT ); Fri, 22 Apr 2011 19:00:04 -0400 Received: from mail-pw0-f53.google.com ([209.85.160.53]) (using TLSv1) by na3sys009aob104.postini.com ([74.125.148.12]) with SMTP ID DSNKTbIIc466WwGtBZdlr5xHY454f1p+NzJP@postini.com; Fri, 22 Apr 2011 16:00:04 PDT Received: by mail-pw0-f53.google.com with SMTP id 7so626197pwj.26 for ; Fri, 22 Apr 2011 16:00:03 -0700 (PDT) Received: by 10.68.10.136 with SMTP id i8mr2453553pbb.248.1303513203577; Fri, 22 Apr 2011 16:00:03 -0700 (PDT) Received: from localhost (c-24-18-179-55.hsd1.wa.comcast.net [24.18.179.55]) by mx.google.com with ESMTPS id u6sm2260193pbq.43.2011.04.22.16.00.02 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 22 Apr 2011 16:00:03 -0700 (PDT) From: Kevin Hilman To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: charu@ti.com Subject: [PATCH 01/15] OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write Date: Fri, 22 Apr 2011 16:01:53 -0700 Message-Id: <1303513327-14532-2-git-send-email-khilman@ti.com> X-Mailer: git-send-email 1.7.4 In-Reply-To: <1303513327-14532-1-git-send-email-khilman@ti.com> References: <1303513327-14532-1-git-send-email-khilman@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 22 Apr 2011 23:00:19 +0000 (UTC) In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update the GPIO support) braces were mistakenly added to included the register read-back inside the cpu_is_* checking. Remove the braces, ensuring that a register read-back is done, even when the IRQSTATUS2 register is not written. Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2 depending on the CPU, but a read-back of any register in that region will cause a flush of the posted writes. Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/gpio.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index d2adcdd..fe6971a 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -813,12 +813,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) else if (cpu_is_omap44xx()) reg = bank->base + OMAP4_GPIO_IRQSTATUS1; - if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) __raw_writel(gpio_mask, reg); /* Flush posted write for the irq status to avoid spurious interrupts */ __raw_readl(reg); - } } static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)