From patchwork Mon May 9 12:29:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Avinash H.M." X-Patchwork-Id: 769022 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p49CTwmk016455 for ; Mon, 9 May 2011 12:29:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752811Ab1EIM34 (ORCPT ); Mon, 9 May 2011 08:29:56 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:39886 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752352Ab1EIM34 (ORCPT ); Mon, 9 May 2011 08:29:56 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p49CTmId013174 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 9 May 2011 07:29:51 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p49CTiIX016526; Mon, 9 May 2011 17:59:44 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Mon, 9 May 2011 17:59:44 +0530 Received: from avinash-laptop.apr.dhcp.ti.com (avinash-laptop.apr.dhcp.ti.com [172.24.137.14]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p49CTf9V026907; Mon, 9 May 2011 17:59:42 +0530 (IST) From: "Avinash.H.M" To: , CC: "Avinash.H.M" , Shweta Gulati , Rajendra Nayak , Paul Wamsley Subject: [PATCH] OMAP3: set the core dpll clk rate in its set_rate function. Date: Mon, 9 May 2011 17:59:40 +0530 Message-ID: <1304944180-20443-1-git-send-email-avinashhm@ti.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 09 May 2011 12:29:59 +0000 (UTC) The debug l3_ick/rate is not displaying the actual rate of the clock in hardware. This is because, the core dpll set_rate function doesn't update the clk.rate. After fixing, the l3_ick/rate is displaying proper values. Signed-off-by: Shweta Gulati Signed-off-by: Avinash.H.M Cc: Rajendra Nayak Cc: Paul Wamsley Acked-by: Paul Walmsley --- * The patch is based on v2.6.39-rc6 * The patch is tested on zoom3. * The patch is based on discussions from http://www.mail-archive.com/linux-omap@vger.kernel.org/msg48518.html arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index b10d9ef..2a77faf 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -118,6 +118,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, 0, 0, 0, 0); + clk->rate = rate; return 0; }