From patchwork Wed May 25 23:38:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 818732 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p4PNd9RC002182 for ; Wed, 25 May 2011 23:39:09 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752667Ab1EYXjI (ORCPT ); Wed, 25 May 2011 19:39:08 -0400 Received: from na3sys009aog107.obsmtp.com ([74.125.149.197]:41858 "EHLO na3sys009aog107.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754904Ab1EYXjH (ORCPT ); Wed, 25 May 2011 19:39:07 -0400 Received: from mail-yw0-f46.google.com ([209.85.213.46]) (using TLSv1) by na3sys009aob107.postini.com ([74.125.148.12]) with SMTP ID DSNKTd2TGq3AIkxuPWDOL0VfEPPiUQ2bNP97@postini.com; Wed, 25 May 2011 16:39:06 PDT Received: by ywe9 with SMTP id 9so101364ywe.19 for ; Wed, 25 May 2011 16:39:06 -0700 (PDT) Received: by 10.236.32.164 with SMTP id o24mr224118yha.116.1306366746012; Wed, 25 May 2011 16:39:06 -0700 (PDT) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id e48sm366792yhk.16.2011.05.25.16.39.04 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 25 May 2011 16:39:05 -0700 (PDT) From: Nishanth Menon To: linux-omap Cc: Kevin , Nishanth Menon Subject: [PM-WIP_CPUFREQ][PATCH V3 2/8] OMAP2+: cpufreq: deny initialization if no mpudev Date: Wed, 25 May 2011 16:38:47 -0700 Message-Id: <1306366733-8439-3-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1306366733-8439-1-git-send-email-nm@ti.com> References: <1306366733-8439-1-git-send-email-nm@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 25 May 2011 23:39:09 +0000 (UTC) if we do not have mpu_dev we normally fail in cpu_init. It is better to fail driver registration if the devices are not available. Signed-off-by: Nishanth Menon --- arch/arm/mach-omap2/omap2plus-cpufreq.c | 15 ++++++++------- 1 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c index a57b322..2d4e9d7 100644 --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c @@ -43,6 +43,7 @@ static struct cpufreq_frequency_table *freq_table; static struct clk *mpu_clk; static char *mpu_clk_name; +static struct device *mpu_dev; static int omap_verify_speed(struct cpufreq_policy *policy) { @@ -155,7 +156,6 @@ skip_lpj: static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; - struct device *mpu_dev; static cpumask_var_t cpumask; mpu_clk = clk_get(NULL, mpu_clk_name); @@ -166,12 +166,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) return -EINVAL; policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); - mpu_dev = omap2_get_mpuss_device(); - - if (!mpu_dev) { - pr_warning("%s: unable to get the mpu device\n", __func__); - return -EINVAL; - } opp_init_cpufreq_table(mpu_dev, &freq_table); if (freq_table) { @@ -244,6 +238,13 @@ static int __init omap_cpufreq_init(void) pr_err("%s: unsupported Silicon?\n", __func__); return -EINVAL; } + + mpu_dev = omap2_get_mpuss_device(); + if (!mpu_dev) { + pr_warning("%s: unable to get the mpu device\n", __func__); + return -EINVAL; + } + return cpufreq_register_driver(&omap_driver); }