From patchwork Mon Jun 27 16:33:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Cousson X-Patchwork-Id: 921652 X-Patchwork-Delegate: b-cousson@ti.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5RGY8F3000881 for ; Mon, 27 Jun 2011 16:34:09 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752810Ab1F0QeF (ORCPT ); Mon, 27 Jun 2011 12:34:05 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:53054 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752807Ab1F0QeD (ORCPT ); Mon, 27 Jun 2011 12:34:03 -0400 Received: from dlep34.itg.ti.com ([157.170.170.115]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p5RGY0MV023996 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 27 Jun 2011 11:34:00 -0500 Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) by dlep34.itg.ti.com (8.13.7/8.13.8) with ESMTP id p5RGY0gi024710; Mon, 27 Jun 2011 11:34:00 -0500 (CDT) Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5RGY0Yh017454; Mon, 27 Jun 2011 11:34:00 -0500 (CDT) Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE73.ent.ti.com (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Mon, 27 Jun 2011 11:34:00 -0500 Received: from localhost.localdomain (lncpu04.tif.ti.com [137.167.102.15]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5RGXlLS003346; Mon, 27 Jun 2011 11:33:58 -0500 From: Benoit Cousson To: , CC: santosh.shilimkar@ti.com, linux-omap@vger.kernel.org, Benoit Cousson Subject: [PATCH 6/7] OMAP4: hwmod data: TEMP: Fix timer1 main_clk Date: Mon, 27 Jun 2011 18:33:10 +0200 Message-ID: <1309192391-12410-7-git-send-email-b-cousson@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1309192391-12410-1-git-send-email-b-cousson@ti.com> References: <1309192391-12410-1-git-send-email-b-cousson@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 27 Jun 2011 16:34:09 +0000 (UTC) Since the timer is still not pm_runtime adapted, it is still using directly the physical clock nodes at init time. Replace the clock node by the original one in the clock data file. Keep the original name until the driver is fixed. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak --- arch/arm/mach-omap2/clock44xx_data.c | 12 ++++++++---- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 547f02b..f1cfa3c 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1765,15 +1765,19 @@ static struct clk dmic_sync_mux_ck = { .recalc = &omap2_clksel_recalc, }; -static struct clk dmt1_clk_mux_ck = { - .name = "dmt1_clk_mux_ck", +/* Merged dmt1_clk_mux into timer1 */ +static struct clk timer1_fck = { + .name = "timer1_fck", .parent = &sys_clkin_ck, .clksel = abe_dpll_bypass_clk_mux_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_MASK, - .ops = &clkops_null, + .ops = &clkops_omap2_dflt, .recalc = &omap2_clksel_recalc, + .enable_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, + .enable_bit = OMAP4430_MODULEMODE_SWCTRL, + .clkdm_name = "l4_wkup_clkdm", }; static const struct clksel fdif_fclk_div[] = { @@ -2527,7 +2531,7 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "cm2_dm4_mux_ck", &cm2_dm4_mux_ck, CK_44XX), CLK(NULL, "cm2_dm9_mux_ck", &cm2_dm9_mux_ck, CK_44XX), CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_44XX), - CLK(NULL, "dmt1_clk_mux_ck", &dmt1_clk_mux_ck, CK_44XX), + CLK(NULL, "gpt1_fck", &timer1_fck, CK_44XX), CLK(NULL, "fdif_fclk", &fdif_fclk, CK_44XX), CLK(NULL, "func_dmic_abe_gfclk", &func_dmic_abe_gfclk, CK_44XX), CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_44XX), diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 5c196a1..729b371 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -4249,7 +4249,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = omap44xx_timer1_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), - .main_clk = "dmt1_clk_mux_ck", + .main_clk = "timer1_fck", .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,