From patchwork Thu Jun 30 00:25:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 931372 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5U0XB0v003220 for ; Thu, 30 Jun 2011 00:34:37 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755162Ab1F3Aeg (ORCPT ); Wed, 29 Jun 2011 20:34:36 -0400 Received: from na3sys009aog115.obsmtp.com ([74.125.149.238]:33888 "EHLO na3sys009aog115.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754144Ab1F3Aeg (ORCPT ); Wed, 29 Jun 2011 20:34:36 -0400 Received: from mail-gx0-f177.google.com ([209.85.161.177]) (using TLSv1) by na3sys009aob115.postini.com ([74.125.148.12]) with SMTP ID DSNKTgvEmmARocMMPZU8+tpfdlL+yYJbA+Dg@postini.com; Wed, 29 Jun 2011 17:34:35 PDT Received: by mail-gx0-f177.google.com with SMTP id 2so1023762gxk.22 for ; Wed, 29 Jun 2011 17:34:34 -0700 (PDT) Received: by 10.150.141.13 with SMTP id o13mr145093ybd.287.1309393624335; Wed, 29 Jun 2011 17:27:04 -0700 (PDT) Received: from localhost.localdomain (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id 5sm1762511ybq.8.2011.06.29.17.27.03 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 29 Jun 2011 17:27:03 -0700 (PDT) From: Mike Turquette To: linux-omap@vger.kernel.org Cc: khilman@ti.com, nm@ti.com, Mike Turquette Subject: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers Date: Wed, 29 Jun 2011 17:25:54 -0700 Message-Id: <1309393560-8874-3-git-send-email-mturquette@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1309393560-8874-1-git-send-email-mturquette@ti.com> References: <1309393560-8874-1-git-send-email-mturquette@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 30 Jun 2011 00:34:37 +0000 (UTC) From: Nishanth Menon We have multiple interrupt status hidden in the PRM interrupt status reg. Make this handling generic to allow us to pull out LDO status such as those for ABB from it using the same data structure and indexing. We hence rename accordingly. We also fix a trivial warning as the variable does not need exporting: arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol 'omap3_prm_irqs' was not declared. Should it be static? Signed-off-by: Nishanth Menon Signed-off-by: Mike Turquette --- arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 +++++++++++----------- arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 +++++-- arch/arm/mach-omap2/prm44xx.c | 28 ++++++++++++++-------------- arch/arm/mach-omap2/prm44xx.h | 7 +++++-- arch/arm/mach-omap2/vp.h | 9 --------- arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- arch/arm/mach-omap2/vp44xx_data.c | 6 +++--- 7 files changed, 40 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 3b83763..8a20242 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) /* PRM VP */ /* - * struct omap3_vp - OMAP3 VP register access description. + * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg */ -struct omap3_vp { +struct omap3_prm_irq { u32 tranxdone_status; }; -struct omap3_vp omap3_vp[] = { - [OMAP3_VP_VDD_MPU_ID] = { +static struct omap3_prm_irq omap3_prm_irqs[] = { + [OMAP3_PRM_IRQ_VDD_MPU_ID] = { .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, }, - [OMAP3_VP_VDD_CORE_ID] = { + [OMAP3_PRM_IRQ_VDD_CORE_ID] = { .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, }, }; #define MAX_VP_ID ARRAY_SIZE(omap3_vp); -u32 omap3_prm_vp_check_txdone(u8 vp_id) +u32 omap3_prm_vp_check_txdone(u8 irq_id) { - struct omap3_vp *vp = &omap3_vp[vp_id]; + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; u32 irqstatus; irqstatus = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - return irqstatus & vp->tranxdone_status; + return irqstatus & irq->tranxdone_status; } -void omap3_prm_vp_clear_txdone(u8 vp_id) +void omap3_prm_vp_clear_txdone(u8 irq_id) { - struct omap3_vp *vp = &omap3_vp[vp_id]; + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; - omap2_prm_write_mod_reg(vp->tranxdone_status, + omap2_prm_write_mod_reg(irq->tranxdone_status, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); } diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 408d1c7..d90b23f 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); +#define OMAP3_PRM_IRQ_VDD_MPU_ID 0 +#define OMAP3_PRM_IRQ_VDD_CORE_ID 1 /* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); +u32 omap3_prm_vp_check_txdone(u8 irq_id); +void omap3_prm_vp_clear_txdone(u8 irq_id); + /* * OMAP3 access functions for voltage controller (VC) and diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 8a3bba3..9d0b641 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -200,49 +200,49 @@ void omap4_prm_global_warm_sw_reset(void) /* PRM VP */ /* - * struct omap4_vp - OMAP4 VP register access description. + * struct omap4_prm_irq - OMAP4 VP register access description. * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg */ -struct omap4_vp { +struct omap4_prm_irq { u32 irqstatus_mpu; u32 tranxdone_status; }; -static struct omap4_vp omap4_vp[] = { - [OMAP4_VP_VDD_MPU_ID] = { +static struct omap4_prm_irq omap4_prm_irqs[] = { + [OMAP4_PRM_IRQ_VDD_MPU_ID] = { .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, }, - [OMAP4_VP_VDD_IVA_ID] = { + [OMAP4_PRM_IRQ_VDD_IVA_ID] = { .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, }, - [OMAP4_VP_VDD_CORE_ID] = { + [OMAP4_PRM_IRQ_VDD_CORE_ID] = { .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, }, }; -u32 omap4_prm_vp_check_txdone(u8 vp_id) +u32 omap4_prm_vp_check_txdone(u8 irq_id) { - struct omap4_vp *vp = &omap4_vp[vp_id]; + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; u32 irqstatus; irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, OMAP4430_PRM_OCP_SOCKET_INST, - vp->irqstatus_mpu); - return irqstatus & vp->tranxdone_status; + irq->irqstatus_mpu); + return irqstatus & irq->tranxdone_status; } -void omap4_prm_vp_clear_txdone(u8 vp_id) +void omap4_prm_vp_clear_txdone(u8 irq_id) { - struct omap4_vp *vp = &omap4_vp[vp_id]; + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; - omap4_prminst_write_inst_reg(vp->tranxdone_status, + omap4_prminst_write_inst_reg(irq->tranxdone_status, OMAP4430_PRM_PARTITION, OMAP4430_PRM_OCP_SOCKET_INST, - vp->irqstatus_mpu); + irq->irqstatus_mpu); }; u32 omap4_prm_vcvp_read(u8 offset) diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 026529f..bd0fc85 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -773,9 +773,12 @@ extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); extern void omap4_prm_global_warm_sw_reset(void); +#define OMAP4_PRM_IRQ_VDD_CORE_ID 0 +#define OMAP4_PRM_IRQ_VDD_IVA_ID 1 +#define OMAP4_PRM_IRQ_VDD_MPU_ID 2 /* OMAP4-specific VP functions */ -u32 omap4_prm_vp_check_txdone(u8 vp_id); -void omap4_prm_vp_clear_txdone(u8 vp_id); +u32 omap4_prm_vp_check_txdone(u8 irq_id); +void omap4_prm_vp_clear_txdone(u8 irq_id); /* * OMAP4 access functions for voltage controller (VC) and diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index f78752b..57a4d44 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -21,15 +21,6 @@ struct voltagedomain; -/* - * Voltage Processor (VP) identifiers - */ -#define OMAP3_VP_VDD_MPU_ID 0 -#define OMAP3_VP_VDD_CORE_ID 1 -#define OMAP4_VP_VDD_CORE_ID 0 -#define OMAP4_VP_VDD_IVA_ID 1 -#define OMAP4_VP_VDD_MPU_ID 2 - /* XXX document */ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 260c554..7bd8181 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -57,7 +57,7 @@ static const struct omap_vp_common omap3_vp_common = { }; struct omap_vp_instance omap3_vp_mpu = { - .id = OMAP3_VP_VDD_MPU_ID, + .id = OMAP3_PRM_IRQ_VDD_MPU_ID, .common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, @@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = { }; struct omap_vp_instance omap3_vp_core = { - .id = OMAP3_VP_VDD_CORE_ID, + .id = OMAP3_PRM_IRQ_VDD_CORE_ID, .common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index b4e7704..6de8ed6 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -56,7 +56,7 @@ static const struct omap_vp_common omap4_vp_common = { }; struct omap_vp_instance omap4_vp_mpu = { - .id = OMAP4_VP_VDD_MPU_ID, + .id = OMAP4_PRM_IRQ_VDD_MPU_ID, .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, @@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = { }; struct omap_vp_instance omap4_vp_iva = { - .id = OMAP4_VP_VDD_IVA_ID, + .id = OMAP4_PRM_IRQ_VDD_IVA_ID, .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, @@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = { }; struct omap_vp_instance omap4_vp_core = { - .id = OMAP4_VP_VDD_CORE_ID, + .id = OMAP4_PRM_IRQ_VDD_CORE_ID, .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,