From patchwork Fri Jul 1 20:27:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Cousson X-Patchwork-Id: 937482 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p61KRqf9016927 for ; Fri, 1 Jul 2011 20:38:12 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755644Ab1GAU2A (ORCPT ); Fri, 1 Jul 2011 16:28:00 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:56855 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755480Ab1GAU16 (ORCPT ); Fri, 1 Jul 2011 16:27:58 -0400 Received: from dlep34.itg.ti.com ([157.170.170.115]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p61KRtVo007412 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 1 Jul 2011 15:27:55 -0500 Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) by dlep34.itg.ti.com (8.13.7/8.13.8) with ESMTP id p61KRtMJ019335; Fri, 1 Jul 2011 15:27:55 -0500 (CDT) Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p61KRtHe028198; Fri, 1 Jul 2011 15:27:55 -0500 (CDT) Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE73.ent.ti.com (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Fri, 1 Jul 2011 15:27:54 -0500 Received: from localhost.localdomain (lncpu04.tif.ti.com [137.167.102.15]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id p61KRhsh007545; Fri, 1 Jul 2011 15:27:53 -0500 From: Benoit Cousson To: , CC: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Santosh Shilimkar , Benoit Cousson Subject: [PATCH v2 5/5] OMAP4: powerdomain data: Remove unsupported MPU powerdomain state Date: Fri, 1 Jul 2011 22:27:40 +0200 Message-ID: <1309552060-4547-6-git-send-email-b-cousson@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1309552060-4547-1-git-send-email-b-cousson@ti.com> References: <1309552060-4547-1-git-send-email-b-cousson@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 01 Jul 2011 20:38:12 +0000 (UTC) From: Santosh Shilimkar On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't be attempted independently. When coming out of MPU OFF state, ROM code disables the clocks of IVAHD, TESLA which is not desirable. Hence the MPU OFF state is not usable on OMAP4430 devices. OMAP4460 onwards, MPU OFF state will be descoped completely because the DDR firewall falls in MPU power domain. When the MPU hit OFF state, DDR won't be accessible for other initiators. The deepest state supported is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. So in summary MPU power domain OFF state is not supported on OMAP4 and onwards designs. Thanks to new PRCM design, device off mode can still be achieved with power domains hitting OSWR state. Signed-off-by: Santosh Shilimkar Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Fix changelog typos] Signed-off-by: Benoit Cousson Cc: Paul Walmsley --- arch/arm/mach-omap2/powerdomains44xx_data.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 8f46e7d..247e794 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { .prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, .pwrsts_mem_ret = {