From patchwork Sat Jul 9 21:37:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 960352 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p69LbZId007252 for ; Sat, 9 Jul 2011 21:37:36 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754888Ab1GIVhe (ORCPT ); Sat, 9 Jul 2011 17:37:34 -0400 Received: from na3sys009aob106.obsmtp.com ([74.125.149.76]:50645 "EHLO na3sys009aog106.obsmtp.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754814Ab1GIVhe (ORCPT ); Sat, 9 Jul 2011 17:37:34 -0400 Received: from mail-yx0-f182.google.com ([209.85.213.182]) (using TLSv1) by na3sys009aob106.postini.com ([74.125.148.12]) with SMTP ID DSNKThjKHUsqPG+NCIjXCXYwHLyC1yNB9qZo@postini.com; Sat, 09 Jul 2011 14:37:34 PDT Received: by yxl31 with SMTP id 31so1438096yxl.13 for ; Sat, 09 Jul 2011 14:37:32 -0700 (PDT) Received: by 10.236.157.97 with SMTP id n61mr3895665yhk.516.1310247452567; Sat, 09 Jul 2011 14:37:32 -0700 (PDT) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id v25sm593063yhk.64.2011.07.09.14.37.30 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 09 Jul 2011 14:37:31 -0700 (PDT) From: Nishanth Menon To: linux-omap Cc: linux-arm , Kevin Hilman , Nishanth Menon Subject: [PATCH] OMAP3+: SR: ensure pm-runtime callbacks can be invoked with IRQ disabled Date: Sat, 9 Jul 2011 14:37:21 -0700 Message-Id: <1310247441-2709-1-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sat, 09 Jul 2011 21:37:36 +0000 (UTC) SmartReflex should be disabled while entering low power mode due to a) SmartReflex values are not defined for retention voltageFurther b) with SmartReflex enabled, if CPU enters lower c-states, FSM will try to bump the voltage to current OPP's voltage for which it has entered c-state; hence SmartReflex needs to be disabled for MPU, CORE and IVA voltage domains in idle path before enabling auto retention voltage achievement on the device. However, since the current pm_runtime setup for SmartReflex devices are setup to allow callbacks to be invoked with interrupts enabled, calling SmartReflex enable/disable from other contexts such as idle paths where preemption is disabled causes warnings such as the following indicating of a potential race. [ 82.023895] [] (__irq_svc+0x3c/0x120) from [] (_raw_spin_unlock_irq+0x28/0x2c) [ 82.023895] [] (_raw_spin_unlock_irq+0x28/0x2c) from [] (rpm_callback+0x4c/0x68) [ 82.023956] [] (rpm_callback+0x4c/0x68) from [] (rpm_resume+0x338/0x53c) [ 82.023956] [] (rpm_resume+0x338/0x53c) from [] (__pm_runtime_resume+0x48/0x60) [ 82.023986] [] (__pm_runtime_resume+0x48/0x60) from [] (sr_enable+0xa8/0x19c) [ 82.023986] [] (sr_enable+0xa8/0x19c) from [] (omap_sr_enable+0x50/0x90) [ 82.024017] [] (omap_sr_enable+0x50/0x90) from [] (omap4_enter_sleep+0x138/0x168) Instead, we use pm_runtime_irq_safe to tell the PM core that callbacks can be invoked in interrupt disabled contexts. Acked-by: Rajendra Nayak Signed-off-by: Nishanth Menon --- arch/arm/mach-omap2/smartreflex.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index f8c6305..444c5b2 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -862,6 +862,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); pm_runtime_enable(&pdev->dev); + pm_runtime_irq_safe(&pdev->dev); sr_info->pdev = pdev; sr_info->srid = pdev->id;