From patchwork Fri Jul 29 12:43:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hrishikesh Bhandiwad X-Patchwork-Id: 1020602 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6TChcj8010922 for ; Fri, 29 Jul 2011 12:43:38 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755975Ab1G2MnZ (ORCPT ); Fri, 29 Jul 2011 08:43:25 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:39572 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755294Ab1G2MnY (ORCPT ); Fri, 29 Jul 2011 08:43:24 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p6TChI1N022554 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 29 Jul 2011 07:43:20 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p6TChHqX027253; Fri, 29 Jul 2011 18:13:17 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Fri, 29 Jul 2011 18:13:17 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p6TChGXp023079; Fri, 29 Jul 2011 18:13:16 +0530 (IST) From: Hrishikesh Bhandiwad To: , , CC: Hrishikesh Bhandiwad , Vaibhav Hiremath , Sanjeev Premi Subject: [PATCH v2] OMAP3: NAND: Adding NAND support and specifying NAND partitions. Date: Fri, 29 Jul 2011 18:13:16 +0530 Message-ID: <1311943396-16710-1-git-send-email-hrishikesh.b@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 29 Jul 2011 12:43:38 +0000 (UTC) This patch adds the NAND support on OMAP3EVM board and also allocates five partitions on NAND. Referred to file: arch/arm/mach-omap2/board-omap3beagle.c Signed-off-by: Vaibhav Hiremath Signed-off-by: Sanjeev Premi Signed-off-by: Hrishikesh Bhandiwad --- arch/arm/mach-omap2/board-omap3evm.c | 37 ++++++++++++++++++++++++++++++++++ 1 files changed, 37 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index b4d4346..3ac96d4 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -30,6 +30,9 @@ #include #include +#include +#include + #include #include #include @@ -101,6 +104,37 @@ static void __init omap3_evm_get_revision(void) } } +static struct mtd_partition omap3evm_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader", + .offset = 0, + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot", + .offset = 0x80000, + .size = 15 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot Env", + .offset = 0x260000, + .size = 1 * NAND_BLOCK_SIZE, + }, + { + .name = "Kernel", + .offset = 0x280000, + .size = 32 * NAND_BLOCK_SIZE, + }, + { + .name = "File System", + .offset = 0x680000, + .size = MTDPART_SIZ_FULL, + }, +}; + #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) #include @@ -696,6 +730,9 @@ static void __init omap3_evm_init(void) omap_serial_init(); + omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions, + ARRAY_SIZE(omap3evm_nand_partitions)); + /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ usb_nop_xceiv_register();