From patchwork Thu Aug 4 15:59:29 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Koyamangalath, Abhilash" X-Patchwork-Id: 1036372 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p74FxwxV025950 for ; Thu, 4 Aug 2011 15:59:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755043Ab1HDP7p (ORCPT ); Thu, 4 Aug 2011 11:59:45 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:43662 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755033Ab1HDP7m (ORCPT ); Thu, 4 Aug 2011 11:59:42 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p74FxUs3025046 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 4 Aug 2011 10:59:33 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p74FxU3p025516; Thu, 4 Aug 2011 21:29:30 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Thu, 4 Aug 2011 21:29:30 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p74FxTHW002350; Thu, 4 Aug 2011 21:29:29 +0530 (IST) From: Abhilash K V To: CC: , , , , , , Vaibhav Hiremath , Abhilash K V Subject: [PATCH 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices Date: Thu, 4 Aug 2011 21:29:29 +0530 Message-ID: <1312473569-1212-1-git-send-email-abhilash.kv@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 04 Aug 2011 15:59:59 +0000 (UTC) From: Vaibhav Hiremath In case of AM3517 & AM3505, Smart Reflex is not applicable so we must not enable it. So add check for am3517/05 cpu revision in omap3_twl_init() and return -ENODEV if true, else continue. Signed-off-by: Vaibhav Hiremath Signed-off-by: Abhilash K V --- arch/arm/mach-omap2/omap_twl.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 07d6140..92fadcb 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -269,6 +269,14 @@ int __init omap3_twl_init(void) if (!cpu_is_omap34xx()) return -ENODEV; + /* + * In case of AM3517/AM3505 we should not be going down + * further, since SR is not applicable there. + */ + if (cpu_is_omap3505() || cpu_is_omap3517()) { + return -ENODEV; + } + if (cpu_is_omap3630()) { omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;