From patchwork Fri Aug 5 07:42:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: archit taneja X-Patchwork-Id: 1037532 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p757YKJx010168 for ; Fri, 5 Aug 2011 07:34:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754151Ab1HEHeT (ORCPT ); Fri, 5 Aug 2011 03:34:19 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:45177 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753926Ab1HEHeS (ORCPT ); Fri, 5 Aug 2011 03:34:18 -0400 Received: from dlep33.itg.ti.com ([157.170.170.112]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p757YIIK022857 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 5 Aug 2011 02:34:18 -0500 Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) by dlep33.itg.ti.com (8.13.7/8.13.8) with ESMTP id p757YHTb011124 for ; Fri, 5 Aug 2011 02:34:17 -0500 (CDT) Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p757YHtp026895 for ; Fri, 5 Aug 2011 02:34:17 -0500 (CDT) Received: from dlelxv24.itg.ti.com (172.17.1.199) by DLEE73.ent.ti.com (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Fri, 5 Aug 2011 02:34:17 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id p757YHCi025635; Fri, 5 Aug 2011 02:34:17 -0500 Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.137.144]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id p757YFf10997; Fri, 5 Aug 2011 02:34:16 -0500 (CDT) From: Archit Taneja To: CC: , Archit Taneja Subject: [PATCH 1/5] OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shortening Date: Fri, 5 Aug 2011 13:12:48 +0530 Message-ID: <1312530172-24095-2-git-send-email-archit@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1312530172-24095-1-git-send-email-archit@ti.com> References: <1312530172-24095-1-git-send-email-archit@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 05 Aug 2011 07:34:20 +0000 (UTC) Prepare dispc_dump_regs() to iterate over manager and overlay id's. Doing this requires modifications of the macro "DUMPREG" which currently needs us to specify the manager/overlay name to get the correct result. For example, in order to print the register DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD), we can't iterate over a varaible i and get the desired result through DUMPREG(DISPC_TIMING_H(i)). Split the registers into 3 sections, the first with no arguments(common registers), the second with one argument(manager/overlay id), and the third with two arguments(overlay id and coefficient index), redefine DUMPREG macros for each of these. Signed-off-by: Archit Taneja --- drivers/video/omap2/dss/dispc.c | 444 +++++++++++++++++++++------------------ 1 files changed, 239 insertions(+), 205 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index d849fa0..cdb53aa 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2712,6 +2712,7 @@ void dispc_dump_regs(struct seq_file *s) if (dispc_runtime_get()) return; + /* DISPC common registers */ DUMPREG(DISPC_REVISION); DUMPREG(DISPC_SYSCONFIG); DUMPREG(DISPC_SYSSTATUS); @@ -2720,242 +2721,275 @@ void dispc_dump_regs(struct seq_file *s) DUMPREG(DISPC_CONTROL); DUMPREG(DISPC_CONFIG); DUMPREG(DISPC_CAPABLE); - DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT)); - DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT)); DUMPREG(DISPC_LINE_STATUS); DUMPREG(DISPC_LINE_NUMBER); - DUMPREG(DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD)); if (dss_has_feature(FEAT_GLOBAL_ALPHA)) DUMPREG(DISPC_GLOBAL_ALPHA); - DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); - DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); if (dss_has_feature(FEAT_MGR_LCD2)) { DUMPREG(DISPC_CONTROL2); DUMPREG(DISPC_CONFIG2); - DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD2)); - } - - DUMPREG(DISPC_OVL_BA0(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_BA1(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_WINDOW_SKIP(OMAP_DSS_GFX)); - DUMPREG(DISPC_OVL_TABLE_BA(OMAP_DSS_GFX)); - - DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); + } + +#undef DUMPREG + +#define DISPC_REG(i, name) name(i) +#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, #i, \ + 48 - strlen(#r) - strlen(#i), " ", \ + dispc_read_reg(DISPC_REG(i, r))) + + /* LCD registers */ + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DEFAULT_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TRANS_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_H); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_V); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_POL_FREQ); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DIVISORo); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_SIZE_MGR); + + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE1); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE2); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE3); if (dss_has_feature(FEAT_CPR)) { - DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); - DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_R); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_G); + DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_B); } + + /* DIGIT registers */ + DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_DEFAULT_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_TRANS_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_SIZE_MGR); + + /* LCD2 registers */ if (dss_has_feature(FEAT_MGR_LCD2)) { - DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DEFAULT_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TRANS_COLOR); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_H); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_V); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_POL_FREQ); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DIVISORo); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_SIZE_MGR); + + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE1); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE2); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE3); if (dss_has_feature(FEAT_CPR)) { - DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); - DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_R); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_G); + DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_B); } } + /* GFX registers */ + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA0); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA1); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_POSITION); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_SIZE); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ATTRIBUTES); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_THRESHOLD); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_SIZE_STATUS); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ROW_INC); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PIXEL_INC); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_WINDOW_SKIP); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_TABLE_BA); if (dss_has_feature(FEAT_PRELOAD)) - DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_GFX)); - - DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_FIR(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_PICTURE_SIZE(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ACCU0(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ACCU1(OMAP_DSS_VIDEO1)); - - DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_FIR(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_PICTURE_SIZE(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ACCU0(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ACCU1(OMAP_DSS_VIDEO2)); - - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 7)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 7)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4)); - if (dss_has_feature(FEAT_FIR_COEF_V)) { - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7)); + DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PRELOAD); + + /* VIDEO1 registers */ + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_POSITION); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_SIZE); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_THRESHOLD); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_SIZE_STATUS); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ROW_INC); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PIXEL_INC); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PICTURE_SIZE); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU1); + if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0_UV); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1_UV); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_1); } - + if (dss_has_feature(FEAT_ATTR2)) + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES2); + if (dss_has_feature(FEAT_PRELOAD)) + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PRELOAD); + + /* VIDEO2 registers */ + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_POSITION); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_SIZE); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_THRESHOLD); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_SIZE_STATUS); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ROW_INC); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PIXEL_INC); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PICTURE_SIZE); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU1); if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_BA1_UV(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_FIR2(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ACCU2_0(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_ACCU2_1(OMAP_DSS_VIDEO1)); - - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 7)); - - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 7)); - - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 7)); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0_UV); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1_UV); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_1); } if (dss_has_feature(FEAT_ATTR2)) - DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1)); - - - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 7)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 7)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4)); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES2); + if (dss_has_feature(FEAT_PRELOAD)) + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PRELOAD); + +#undef DISPC_REG +#undef DUMPREG + +#define DISPC_REG(plane, name, i) name(plane, i) +#define DUMPREG(plane, name, i) \ + seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, #plane, \ + 46 - strlen(#name) - strlen(#plane), " ", \ + dispc_read_reg(DISPC_REG(plane, name, i))) + + /* VIDEO1 coefficient registers */ + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 7); + + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 7); + + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 4); if (dss_has_feature(FEAT_FIR_COEF_V)) { - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7)); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 7); } if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_BA1_UV(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_FIR2(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ACCU2_0(OMAP_DSS_VIDEO2)); - DUMPREG(DISPC_OVL_ACCU2_1(OMAP_DSS_VIDEO2)); - - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 7)); - - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 7)); - - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 0)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 1)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 2)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 3)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 4)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 5)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 6)); - DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 7)); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 7); + + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 7); + + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 0); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 1); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 2); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 3); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 4); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 5); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 6); + DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 7); + } + + /* VIDEO2 coefficient registers */ + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 7); + + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 7); + + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 4); + if (dss_has_feature(FEAT_FIR_COEF_V)) { + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 7); } - if (dss_has_feature(FEAT_ATTR2)) - DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); - if (dss_has_feature(FEAT_PRELOAD)) { - DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO1)); - DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO2)); + if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 7); + + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 7); + + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 0); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 1); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 2); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 3); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 4); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 5); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 6); + DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 7); } dispc_runtime_put(); + +#undef DISPC_REG #undef DUMPREG }