From patchwork Tue Aug 23 12:28:13 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 1088302 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7NCSbAb002050 for ; Tue, 23 Aug 2011 12:28:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753685Ab1HWM2m (ORCPT ); Tue, 23 Aug 2011 08:28:42 -0400 Received: from na3sys009aog101.obsmtp.com ([74.125.149.67]:39542 "EHLO na3sys009aog101.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753191Ab1HWM2l (ORCPT ); Tue, 23 Aug 2011 08:28:41 -0400 Received: from mail-bw0-f41.google.com ([209.85.214.41]) (using TLSv1) by na3sys009aob101.postini.com ([74.125.148.12]) with SMTP ID DSNKTlOc+FUTfpmLM8KwoO7nZ2+NwrwJQziw@postini.com; Tue, 23 Aug 2011 05:28:41 PDT Received: by mail-bw0-f41.google.com with SMTP id zt4so42405bkb.28 for ; Tue, 23 Aug 2011 05:28:40 -0700 (PDT) Received: by 10.204.156.73 with SMTP id v9mr1604005bkw.380.1314102520414; Tue, 23 Aug 2011 05:28:40 -0700 (PDT) Received: from localhost.localdomain (a62-248-128-208.elisa-laajakaista.fi [62.248.128.208]) by mx.google.com with ESMTPS id v22sm49449bkw.12.2011.08.23.05.28.38 (version=SSLv3 cipher=OTHER); Tue, 23 Aug 2011 05:28:39 -0700 (PDT) From: Tomi Valkeinen To: linux-omap@vger.kernel.org, paul@pwsan.com, linux-arm-kernel@lists.infradead.org Cc: Tomi Valkeinen Subject: [PATCH 3/9] OMAP3: HWMOD: Fix DSS reset Date: Tue, 23 Aug 2011 15:28:13 +0300 Message-Id: <1314102499-30407-4-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1314102499-30407-1-git-send-email-tomi.valkeinen@ti.com> References: <1314102499-30407-1-git-send-email-tomi.valkeinen@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 23 Aug 2011 12:28:43 +0000 (UTC) DSS needs all DSS clocks to be enabled to be able to finish reset properly. Before v3.1-rc1 the omapdss driver was managing clocks and resets correctly. However, when omapdss started using runtime PM at v3.1-rc1, the responsibility for the reset moved to HWMOD framework. HWMOD framework does not currently enable all the DSS clocks when resetting the DSS hardware. This hasn't caused any problems so far, but we may just have been lucky. dss_core's opt-clocks is also missing dss_96m_fck, which is a DSS clock present only on OMAP3430, and thus required on OMAP3430 to finish the reset. This patch sets HWMOD_CONTROL_OPT_CLKS_IN_RESET and adds the dss_96m_fck opt-clock for dss_core in OMAP3 HWMOD data, fixing the issue. Signed-off-by: Tomi Valkeinen --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 25bf43b..484eda3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1365,13 +1365,19 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = { }; static struct omap_hwmod_opt_clk dss_opt_clks[] = { - { .role = "tv_clk", .clk = "dss_tv_fck" }, - { .role = "video_clk", .clk = "dss_96m_fck" }, + /* + * The DSS HW needs all DSS clocks enabled during reset. The dss_core + * driver does not use these clocks. + */ { .role = "sys_clk", .clk = "dss2_alwon_fck" }, + { .role = "tv_clk", .clk = "dss_tv_fck" }, + /* required only on OMAP3430 */ + { .role = "tv_dac_clk", .clk = "dss_96m_fck" }, }; static struct omap_hwmod omap3430es1_dss_core_hwmod = { .name = "dss_core", + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, @@ -1396,6 +1402,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { static struct omap_hwmod omap3xxx_dss_core_hwmod = { .name = "dss_core", + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs,