@@ -434,13 +434,13 @@ const struct omap_hdmi_ip_driver *omap_hdmi_functions;
/* HDMI OMAP4 Functions*/
const struct omap_hdmi_ip_driver omap4_hdmi_functions = {
- .video_configure = hdmi_basic_configure,
- .phy_enable = hdmi_phy_enable,
- .phy_disable = hdmi_phy_disable,
- .read_edid = read_edid,
- .pll_enable = hdmi_pll_enable,
- .pll_disable = hdmi_pll_disable,
- .video_enable = hdmi_wp_video_start,
+ .video_configure = hdmi_ti_4xxx_basic_configure,
+ .phy_enable = hdmi_ti_4xxx_phy_enable,
+ .phy_disable = hdmi_ti_4xxx_phy_disable,
+ .read_edid = hdmi_ti_4xxx_read_edid,
+ .pll_enable = hdmi_ti_4xxx_pll_enable,
+ .pll_disable = hdmi_ti_4xxx_pll_disable,
+ .video_enable = hdmi_ti_4xxx_wp_video_start,
};
void dss_hdmi_features_init(struct hdmi_ip_data *ip_data)
@@ -194,7 +194,7 @@ static int hdmi_pll_reset(struct hdmi_ip_data *ip_data)
return 0;
}
-int hdmi_pll_enable(struct hdmi_ip_data *ip_data)
+int hdmi_ti_4xxx_pll_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
enum hdmi_clk_refsel refsel;
@@ -220,12 +220,12 @@ int hdmi_pll_enable(struct hdmi_ip_data *ip_data)
return 0;
}
-void hdmi_pll_disable(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_pll_disable(struct hdmi_ip_data *ip_data)
{
hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF);
}
-int hdmi_phy_enable(struct hdmi_ip_data *ip_data)
+int hdmi_ti_4xxx_phy_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
void __iomem *phy_base = hdmi_phy_base(ip_data);
@@ -262,7 +262,7 @@ int hdmi_phy_enable(struct hdmi_ip_data *ip_data)
return 0;
}
-void hdmi_phy_disable(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_phy_disable(struct hdmi_ip_data *ip_data)
{
hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
}
@@ -368,7 +368,8 @@ static int hdmi_core_ddc_edid(struct hdmi_ip_data *ip_data,
return 0;
}
-int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length)
+int hdmi_ti_4xxx_read_edid(struct hdmi_ip_data *ip_data,
+ u8 *pedid, u16 max_length)
{
int r = 0, n = 0, i = 0;
int max_ext_blocks = (max_length / 128) - 1;
@@ -621,7 +622,7 @@ static void hdmi_wp_init(struct omap_video_timings *timings,
}
-void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start)
+void hdmi_ti_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start)
{
REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, start, 31, 31);
}
@@ -688,7 +689,7 @@ static void hdmi_wp_video_config_timing(struct hdmi_ip_data *ip_data,
hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v);
}
-void hdmi_basic_configure(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_basic_configure(struct hdmi_ip_data *ip_data)
{
/* HDMI */
struct omap_video_timings video_timing;
@@ -84,11 +84,12 @@ struct hdmi_ip_data {
struct hdmi_config cfg;
struct hdmi_pll_info pll_data;
};
-int hdmi_phy_enable(struct hdmi_ip_data *ip_data);
-void hdmi_phy_disable(struct hdmi_ip_data *ip_data);
-int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length);
-void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
-int hdmi_pll_enable(struct hdmi_ip_data *ip_data);
-void hdmi_pll_disable(struct hdmi_ip_data *ip_data);
-void hdmi_basic_configure(struct hdmi_ip_data *ip_data);
+int hdmi_ti_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
+void hdmi_ti_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
+int hdmi_ti_4xxx_read_edid(struct hdmi_ip_data *ip_data,
+ u8 *pedid, u16 max_length);
+void hdmi_ti_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
+int hdmi_ti_4xxx_pll_enable(struct hdmi_ip_data *ip_data);
+void hdmi_ti_4xxx_pll_disable(struct hdmi_ip_data *ip_data);
+void hdmi_ti_4xxx_basic_configure(struct hdmi_ip_data *ip_data);
#endif