From patchwork Wed Aug 31 13:21:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 1115892 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7VDMKRm022760 for ; Wed, 31 Aug 2011 13:22:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755705Ab1HaNWS (ORCPT ); Wed, 31 Aug 2011 09:22:18 -0400 Received: from na3sys009aog104.obsmtp.com ([74.125.149.73]:53325 "EHLO na3sys009aog104.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755581Ab1HaNWR (ORCPT ); Wed, 31 Aug 2011 09:22:17 -0400 Received: from mail-ww0-f42.google.com ([74.125.82.42]) (using TLSv1) by na3sys009aob104.postini.com ([74.125.148.12]) with SMTP ID DSNKTl41g01xKiLnAxZ3YIJY4fbtFGZH3KVH@postini.com; Wed, 31 Aug 2011 06:22:13 PDT Received: by mail-ww0-f42.google.com with SMTP id 5so152598wwe.5 for ; Wed, 31 Aug 2011 06:22:11 -0700 (PDT) Received: by 10.227.29.37 with SMTP id o37mr403676wbc.23.1314796931497; Wed, 31 Aug 2011 06:22:11 -0700 (PDT) Received: from localhost.localdomain (a62-248-128-208.elisa-laajakaista.fi [62.248.128.208]) by mx.google.com with ESMTPS id fy13sm3685472wbb.56.2011.08.31.06.22.09 (version=SSLv3 cipher=OTHER); Wed, 31 Aug 2011 06:22:10 -0700 (PDT) From: Tomi Valkeinen To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org Cc: archit@ti.com, mythripk@ti.com, Tomi Valkeinen Subject: [PATCH 7/8] OMAP: DSS2: DISPC: improve dispc_mgr_enable_digit_out() Date: Wed, 31 Aug 2011 16:21:47 +0300 Message-Id: <1314796908-17354-8-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1314796908-17354-1-git-send-email-tomi.valkeinen@ti.com> References: <1314796908-17354-1-git-send-email-tomi.valkeinen@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 31 Aug 2011 13:22:20 +0000 (UTC) dispc_mgr_enable_digit_out() didn't handle HDMI case very well. Improve the function to use FRAMEDONETV interrupt to see when HDMI has been disabled. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 49 +++++++++++++++++++++++---------------- 1 files changed, 29 insertions(+), 20 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 7f3d847..4af4bd4 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -1924,11 +1924,16 @@ static void _enable_digit_out(bool enable) static void dispc_mgr_enable_digit_out(bool enable) { struct completion frame_done_completion; - int r; + enum dss_hdmi_venc_clk_source_select src; + int r, i; + u32 irq_mask; + int num_irqs; if (REG_GET(DISPC_CONTROL, 1, 1) == enable) return; + src = dss_get_hdmi_venc_clk_source(); + if (enable) { unsigned long flags; /* When we enable digit output, we'll get an extra digit @@ -1945,36 +1950,40 @@ static void dispc_mgr_enable_digit_out(bool enable) * wait for the extra sync losts */ init_completion(&frame_done_completion); + if (src == DSS_HDMI_M_PCLK && enable == false) { + irq_mask = DISPC_IRQ_FRAMEDONETV; + num_irqs = 1; + } else { + irq_mask = DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD; + /* XXX I understand from TRM that we should only wait for the + * current field to complete. But it seems we have to wait for + * both fields */ + num_irqs = 2; + } + r = omap_dispc_register_isr(dispc_disable_isr, &frame_done_completion, - DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD); + irq_mask); if (r) - DSSERR("failed to register EVSYNC isr\n"); + DSSERR("failed to register %x isr\n", irq_mask); _enable_digit_out(enable); - /* XXX I understand from TRM that we should only wait for the - * current field to complete. But it seems we have to wait - * for both fields */ - if (!wait_for_completion_timeout(&frame_done_completion, - msecs_to_jiffies(100))) - DSSERR("timeout waiting for EVSYNC\n"); - - if (!wait_for_completion_timeout(&frame_done_completion, - msecs_to_jiffies(100))) - DSSERR("timeout waiting for EVSYNC\n"); + for (i = 0; i < num_irqs; ++i) { + if (!wait_for_completion_timeout(&frame_done_completion, + msecs_to_jiffies(100))) + DSSERR("timeout waiting for digit out to %s\n", + enable ? "start" : "stop"); + } - r = omap_dispc_unregister_isr(dispc_disable_isr, - &frame_done_completion, - DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD); + r = omap_dispc_unregister_isr(dispc_disable_isr, &frame_done_completion, + irq_mask); if (r) - DSSERR("failed to unregister EVSYNC isr\n"); + DSSERR("failed to unregister %x isr\n", irq_mask); if (enable) { unsigned long flags; spin_lock_irqsave(&dispc.irq_lock, flags); - dispc.irq_error_mask = DISPC_IRQ_MASK_ERROR; - if (dss_has_feature(FEAT_MGR_LCD2)) - dispc.irq_error_mask |= DISPC_IRQ_SYNC_LOST2; + dispc.irq_error_mask |= DISPC_IRQ_SYNC_LOST_DIGIT; dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT); _omap_dispc_set_irqs(); spin_unlock_irqrestore(&dispc.irq_lock, flags);