@@ -19,10 +19,17 @@
#ifndef __ASSEMBLER__
#ifdef CONFIG_CACHE_L2X0
-extern void __iomem *l2cache_base;
+extern void __iomem *omap4_get_l2cache_base(void);
#endif
-extern void __iomem *gic_dist_base_addr;
+#ifdef CONFIG_SMP
+extern void __iomem *omap4_get_scu_base(void);
+#else
+static inline void __iomem *omap4_get_scu_base(void)
+{
+ return NULL;
+}
+#endif
extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
@@ -31,6 +31,11 @@ static void __iomem *scu_base;
static DEFINE_SPINLOCK(boot_lock);
+void __iomem *omap4_get_scu_base(void)
+{
+ return scu_base;
+}
+
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
@@ -27,7 +27,7 @@
#include <mach/omap4-common.h>
#ifdef CONFIG_CACHE_L2X0
-void __iomem *l2cache_base;
+static void __iomem *l2cache_base;
#endif
void __iomem *gic_dist_base_addr;
@@ -96,6 +96,11 @@ void __init gic_init_irq(void)
#ifdef CONFIG_CACHE_L2X0
+void __iomem *omap4_get_l2cache_base(void)
+{
+ return l2cache_base;
+}
+
static void omap4_l2x0_disable(void)
{
/* Disable PL310 L2 Cache controller */
This patch exports APIs to get base address for GIC distributor, CPU interface, SCU and PL310 L2 Cache which are used in OMAP4 PM code. This was suggested by Kevin Hilman <khilman@ti.com> during OMAP4 PM code review. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> --- arch/arm/mach-omap2/include/mach/omap4-common.h | 11 +++++++++-- arch/arm/mach-omap2/omap-smp.c | 5 +++++ arch/arm/mach-omap2/omap4-common.c | 7 ++++++- 3 files changed, 20 insertions(+), 3 deletions(-)