From patchwork Wed Sep 7 17:02:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Kumar Gupta X-Patchwork-Id: 1128062 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p87H5LFV008468 for ; Wed, 7 Sep 2011 17:05:24 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754977Ab1IGRCu (ORCPT ); Wed, 7 Sep 2011 13:02:50 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:52124 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754319Ab1IGRCe (ORCPT ); Wed, 7 Sep 2011 13:02:34 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p87H2TdW016208 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 7 Sep 2011 12:02:32 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p87H2Sb6001037; Wed, 7 Sep 2011 22:32:29 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Wed, 7 Sep 2011 22:32:28 +0530 Received: from psplinux050.india.ti.com (psplinux050.india.ti.com [172.24.162.243]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p87H2RdP022815; Wed, 7 Sep 2011 22:32:27 +0530 (IST) Received: (from a0393629@localhost) by psplinux050.india.ti.com (8.13.1/8.13.8/Submit) id p87H2R3s019871; Wed, 7 Sep 2011 22:32:27 +0530 From: Ajay Kumar Gupta To: CC: , , , Ravi Babu , Benoit Cousson , Keshava Munegowda , Ajay Kumar Gupta Subject: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx Date: Wed, 7 Sep 2011 22:32:20 +0530 Message-ID: <1315414945-19829-2-git-send-email-ajay.gupta@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1315414945-19829-1-git-send-email-ajay.gupta@ti.com> References: <1315414945-19829-1-git-send-email-ajay.gupta@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 07 Sep 2011 17:05:24 +0000 (UTC) From: Ravi Babu The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three irqs and three address spaces for usbss, musb0 and musb1 respectively. Created one hwmod with three irq and memory resources. Cc: Benoit Cousson Cc: Keshava Munegowda Signed-off-by: Ajay Kumar Gupta Signed-off-by: Ravi Babu Acked-By: Keshava Munegowda --- arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74 ++++++++++++++++++++++++++++ 1 files changed, 74 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index e73a4c6..e960d70 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod; static struct omap_hwmod ti81xx_timer5_hwmod; static struct omap_hwmod ti81xx_timer6_hwmod; static struct omap_hwmod ti81xx_timer7_hwmod; +static struct omap_hwmod ti81xx_usbss_hwmod; /* L4 SLOW -> TIMER1 interface */ static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = { @@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X) }; +/* L3 SLOW -> USBSS interface */ +static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = { + { + .name = "usbss", + .pa_start = 0x47400000, + .pa_end = 0x47400000 + SZ_4K - 1, + .flags = ADDR_TYPE_RT + }, + { + .name = "musb0", + .pa_start = 0x47401000, + .pa_end = 0x47401000 + SZ_2K - 1, + .flags = ADDR_TYPE_RT + }, + { + .name = "musb1", + .pa_start = 0x47401800, + .pa_end = 0x47401800 + SZ_2K - 1, + .flags = ADDR_TYPE_RT + }, + { + }, +}; + +static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = { + .rev_offs = 0x0, + .sysc_offs = 0x10, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class ti81xx_usbotg_class = { + .name = "usbotg", + .sysc = &ti81xx_usbhsotg_sysc, +}; + +static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = { + { .name = "usbss-irq", .irq = 17, }, + { .name = "musb0-irq", .irq = 18, }, + { .name = "musb1-irq", .irq = 19, }, + { .irq = -1, }, +}; + +static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = { + .master = &ti81xx_l3_slow_hwmod, + .slave = &ti81xx_usbss_hwmod, + .clk = "usbotg_ick", + .addr = ti81xx_usbss_addr_space, + .user = OCP_USER_MPU, + .flags = OCPIF_SWSUP_IDLE, +}; + +static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = { + &ti81xx_l3_slow__usbss, +}; + +static struct omap_hwmod ti81xx_usbss_hwmod = { + .name = "usb_otg_hs", + .mpu_irqs = ti81xx_usbss_mpu_irqs, + .main_clk = "usbotg_ick", + .clkdm_name = "default_usb_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET, + }, + }, + .slaves = ti81xx_usbss_slaves, + .slaves_cnt = ARRAY_SIZE(ti81xx_usbss_slaves), + .class = &ti81xx_usbotg_class, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X) +}; static __initdata struct omap_hwmod *ti81xx_hwmods[] = { &ti81xx_l3_fast_hwmod, @@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = { &ti81xx_timer5_hwmod, &ti81xx_timer6_hwmod, &ti81xx_timer7_hwmod, + &ti81xx_usbss_hwmod, NULL, };