From patchwork Thu Sep 8 13:03:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saxena, Parth" X-Patchwork-Id: 1129622 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p88D3QoZ029795 for ; Thu, 8 Sep 2011 13:03:40 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932672Ab1IHNDR (ORCPT ); Thu, 8 Sep 2011 09:03:17 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:56884 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932609Ab1IHNDQ (ORCPT ); Thu, 8 Sep 2011 09:03:16 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p88D35d2019970 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 8 Sep 2011 08:03:08 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88D34ua026956; Thu, 8 Sep 2011 18:33:04 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Thu, 8 Sep 2011 18:33:04 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88D320f025324; Thu, 8 Sep 2011 18:33:03 +0530 (IST) From: "Saxena, Parth" To: CC: , "Saxena, Parth" , "Basheer, Mansoor Ahamed" Subject: [PATCH] ti816x: add support for nand on ti8168 evm Date: Thu, 8 Sep 2011 18:33:02 +0530 Message-ID: <1315486982-30109-1-git-send-email-parth.saxena@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 08 Sep 2011 13:03:41 +0000 (UTC) Add partition table for NAND device on TI8168 EVM and initialise the NAND module. Signed-off-by: Saxena, Parth Signed-off-by: Basheer, Mansoor Ahamed --- This patch is tested on top of linux-omap/master and Hemant's patches submitted recently. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg53457.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg54296.html arch/arm/mach-omap2/board-ti8168evm.c | 39 +++++++++++++++++++++++++++++++++ 1 files changed, 39 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index e516a04..87953bb 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -14,6 +14,7 @@ */ #include #include +#include #include #include @@ -23,6 +24,42 @@ #include #include #include +#include +#include + +#include "board-flash.h" + +#define NAND_BLOCK_SIZE SZ_128K + +static struct mtd_partition ti816x_nand_partitions[] = { +/* All the partition sizes are listed in terms of NAND block size */ + { + .name = "U-Boot", + .offset = 0, /* Offset = 0x0 */ + .size = 18 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot Env", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */ + .size = 2 * NAND_BLOCK_SIZE, + }, + { + .name = "Kernel", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 34 * NAND_BLOCK_SIZE, + }, + { + .name = "File System", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x6C0000 */ + .size = 1601 * NAND_BLOCK_SIZE, + }, + { + .name = "Reserved", + .offset = MTDPART_OFS_APPEND, /* Offset = 0xCEE0000 */ + .size = MTDPART_SIZ_FULL, + }, +}; static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { }; @@ -35,6 +72,8 @@ static void __init ti8168_init_early(void) static void __init ti8168_evm_init(void) { + board_nand_init(ti816x_nand_partitions, + ARRAY_SIZE(ti816x_nand_partitions), 0, NAND_BUSWIDTH_16); omap_serial_init(); omap_board_config = ti8168_evm_config; omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);