From patchwork Sat Jul 28 00:21:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricardo Neri X-Patchwork-Id: 1251121 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id BF45FDFFC0 for ; Sat, 28 Jul 2012 00:24:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751709Ab2G1AYF (ORCPT ); Fri, 27 Jul 2012 20:24:05 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:47355 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751350Ab2G1AYE (ORCPT ); Fri, 27 Jul 2012 20:24:04 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q6S0O4El014513 for ; Fri, 27 Jul 2012 19:24:04 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q6S0O4xC020954 for ; Fri, 27 Jul 2012 19:24:04 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Fri, 27 Jul 2012 19:24:03 -0500 Received: from localhost (dexx0075479.dextra-mty.naucm.ext.ti.com [10.87.226.137]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q6S0O3k0019190; Fri, 27 Jul 2012 19:24:03 -0500 From: Ricardo Neri To: CC: , , , Ricardo Neri Subject: [PATCH 2/2] OMAPDSS:HDMI: Improve error handling at power on Date: Fri, 27 Jul 2012 19:21:37 -0500 Message-ID: <1343434897-8444-3-git-send-email-ricardo.neri@ti.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1343434897-8444-1-git-send-email-ricardo.neri@ti.com> References: <1343434897-8444-1-git-send-email-ricardo.neri@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Handle the errors that may occur when selecting the source of the sync signal for the DIGIT channel of the display controller and when enabling the PHY. Signed-off-by: Ricardo Neri --- drivers/video/omap2/dss/hdmi.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 060216f..3caac2a 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c @@ -501,13 +501,17 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) r = hdmi.ip_data.ops->phy_enable(&hdmi.ip_data); if (r) { DSSDBG("Failed to start PHY\n"); - goto err; + goto err_phy_enable; } hdmi.ip_data.ops->video_configure(&hdmi.ip_data); /* Make selection of HDMI in DSS */ - dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); + r = dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); + if (r) { + DSSDBG("Failed to start PHY\n"); + goto err_src_hdmi_venc; + } /* Select the dispc clock source as PRCM clock, to ensure that it is not * DSI PLL source as the clock selected by DSI PLL might not be @@ -536,7 +540,9 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) err_mgr_enable: hdmi.ip_data.ops->video_disable(&hdmi.ip_data); err_vid_enable: +err_src_hdmi_venc: hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); +err_phy_enable: hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); err: hdmi_runtime_put();