From patchwork Mon Aug 13 11:07:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 1312061 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 88CF03FC23 for ; Mon, 13 Aug 2012 11:07:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751908Ab2HMLHf (ORCPT ); Mon, 13 Aug 2012 07:07:35 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:56530 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751903Ab2HMLHe (ORCPT ); Mon, 13 Aug 2012 07:07:34 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7DB7W5L001928; Mon, 13 Aug 2012 06:07:33 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7DB7VSx010512; Mon, 13 Aug 2012 16:37:31 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Mon, 13 Aug 2012 16:37:31 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7DB7R4Z031095; Mon, 13 Aug 2012 16:37:31 +0530 From: Santosh Shilimkar To: CC: , , Santosh Shilimkar Subject: [PATCH 2/2] ARM: OMAP5: Enable arch timer support Date: Mon, 13 Aug 2012 16:37:25 +0530 Message-ID: <1344856045-15134-3-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1344856045-15134-1-git-send-email-santosh.shilimkar@ti.com> References: <1344856045-15134-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Enable Cortex A15 generic timer support for OMAP5 based SOCs. The CPU local timers run on the free running real time counter clock. Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/omap5.dtsi | 6 ++++++ arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/timer.c | 7 +++++++ 3 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 57e5270..9686056 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -73,6 +73,12 @@ <0x48212000 0x1000>; }; + arch-timer { + compatible = "arm,armv7-timer"; + interrupts = <1 14 0x304>; + clock-frequency = <6140000>; + }; + gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio1"; diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2120f90..53fb77c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -73,6 +73,7 @@ config SOC_OMAP5 select ARM_GIC select HAVE_SMP select SOC_HAS_REALTIME_COUNTER + select ARM_ARCH_TIMER comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 9b17e6c..f74dbb2 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -41,6 +41,7 @@ #include #include #include +#include #include "common.h" #include #include @@ -480,9 +481,15 @@ OMAP_SYS_TIMER(4) #ifdef CONFIG_SOC_OMAP5 static void __init omap5_timer_init(void) { + int err; + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); omap2_clocksource_init(2, OMAP4_MPU_SOURCE); realtime_counter_init(); + + err = arch_timer_of_register(); + if (err) + pr_err("%s: arch_timer_register failed %d\n", __func__, err); } OMAP_SYS_TIMER(5) #endif