From patchwork Tue Aug 14 14:22:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1320361 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 261DFDF215 for ; Tue, 14 Aug 2012 14:28:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756228Ab2HNOWw (ORCPT ); Tue, 14 Aug 2012 10:22:52 -0400 Received: from na3sys009aog132.obsmtp.com ([74.125.149.250]:46250 "EHLO na3sys009aog132.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752086Ab2HNOWs (ORCPT ); Tue, 14 Aug 2012 10:22:48 -0400 Received: from mail-ob0-f172.google.com ([209.85.214.172]) (using TLSv1) by na3sys009aob132.postini.com ([74.125.148.12]) with SMTP ID DSNKUCpfOHtCtyxlDuaTPU9Hle+K9+DkxbYb@postini.com; Tue, 14 Aug 2012 07:22:48 PDT Received: by obbwc20 with SMTP id wc20so865737obb.17 for ; Tue, 14 Aug 2012 07:22:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=nmEM+U2j+sSm3bqGJYrhh6twARXbLt5rx+EXvSuZPwA=; b=pN7uzTK4x8qkfG7SM2FYzVe28SOW0snQ6vUlDCRtofnFgnYU065XhDaHT+jXswiXon 9qlU/fKjakyS9QV7j2/KnYtriioxkyPGf2KXHaUhbEzpE7FKMv1NpO1sPGBTCoM0XLXY 8rzF83LWUWB4KQ2TugWEcXpa2ky8id4mGIw73C0Ra+MoOJTLYxUxTAe+dZg7ThM3FvxJ mmy8nEoJhAvw8U/kF95VS1ITy3zaGgYy000k5hxFNxmyNEionfAN3pQEEShPIvpNmHMF lIGSQJz8DCwo+XaGkuwQNzBuj1TqvyWcfeVU+Xm44c47nwnx9ZDjM4cK19sIsdrzoELO bEuw== Received: by 10.182.50.68 with SMTP id a4mr19044503obo.59.1344954166701; Tue, 14 Aug 2012 07:22:46 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id kc5sm2799741obb.21.2012.08.14.07.22.43 (version=SSLv3 cipher=OTHER); Tue, 14 Aug 2012 07:22:46 -0700 (PDT) From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , Tony Lindgren , Grant Likely , Rob Herring Cc: Tero Kristo , alsa-devel@alsa-project.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, Benoit Cousson , linux-kernel@vger.kernel.org Subject: [PATCH v2 04/14] MFD: twl-core: Add API to query the HFCLK rate Date: Tue, 14 Aug 2012 17:22:32 +0300 Message-Id: <1344954162-7985-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1344954162-7985-1-git-send-email-peter.ujfalusi@ti.com> References: <1344954162-7985-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQkcu3MnO31v820CaMsX0fDhjDfH1prCXfThjix8V1XyvtbpKSJihLFdMq/yOM5MZKCEYQvj Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org CFG_BOOT register's HFCLK_FREQ field hold information about the used HFCLK frequency. Add possibility for users to get the configured rate based on this register. This register was configured during boot, without it the chip would not operate correctly, so we can trust on this information. Signed-off-by: Peter Ujfalusi --- drivers/mfd/twl-core.c | 32 ++++++++++++++++++++++++++++++++ include/linux/i2c/twl.h | 1 + 2 files changed, 33 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 1c32afe..f162b68 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -552,6 +552,38 @@ int twl_get_version(void) } EXPORT_SYMBOL_GPL(twl_get_version); +/** + * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate. + * + * Api to get the TWL HFCLK rate based on BOOT_CFG register. + */ +int twl_get_hfclk_rate(void) +{ + u8 ctrl; + int rate; + + twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT); + + switch (ctrl & 0x3) { + case HFCLK_FREQ_19p2_MHZ: + rate = 19200000; + break; + case HFCLK_FREQ_26_MHZ: + rate = 26000000; + break; + case HFCLK_FREQ_38p4_MHZ: + rate = 38400000; + break; + default: + pr_err("TWL4030: HFCLK is not configured\n"); + rate = -EINVAL; + break; + } + + return rate; +} +EXPORT_SYMBOL_GPL(twl_get_hfclk_rate); + static struct device * add_numbered_child(unsigned chip, const char *name, int num, void *pdata, unsigned pdata_len, diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 7ea898c..ac6488c 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -188,6 +188,7 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); int twl_get_type(void); int twl_get_version(void); +int twl_get_hfclk_rate(void); int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); int twl6030_interrupt_mask(u8 bit_mask, u8 offset);