From patchwork Thu Aug 16 14:03:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shubhrajyoti Datta X-Patchwork-Id: 1332391 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id F2CC940210 for ; Thu, 16 Aug 2012 14:04:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932656Ab2HPOEu (ORCPT ); Thu, 16 Aug 2012 10:04:50 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:54511 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932573Ab2HPOEs (ORCPT ); Thu, 16 Aug 2012 10:04:48 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7GE49LH014003; Thu, 16 Aug 2012 09:04:10 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7GE47U6025889; Thu, 16 Aug 2012 19:34:07 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Thu, 16 Aug 2012 19:34:07 +0530 Received: from ula0393217.india.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7GE44Kj027608; Thu, 16 Aug 2012 19:34:07 +0530 From: Shubhrajyoti D To: CC: , , , , , Felipe Balbi , Shubhrajyoti D Subject: [PATCHv7 06/24] i2c: omap: split out [XR]DR and [XR]RDY Date: Thu, 16 Aug 2012 19:33:37 +0530 Message-ID: <1345125835-15524-7-git-send-email-shubhrajyoti@ti.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1345125835-15524-1-git-send-email-shubhrajyoti@ti.com> References: <1345125835-15524-1-git-send-email-shubhrajyoti@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Felipe Balbi While they do pretty much the same thing, there are a few peculiarities. Specially WRT erratas, it's best to split those out and re-factor the read/write loop to another function which both cases call. This last part will be done on another patch. While at that, also avoid an unncessary register read since dev->fifo_len will always contain the correct amount of data to be transferred. Signed-off-by: Felipe Balbi Signed-off-by: Shubhrajyoti D --- drivers/i2c/busses/i2c-omap.c | 126 ++++++++++++++++++++++++++++++----------- 1 files changed, 92 insertions(+), 34 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 8009095..139602f 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -801,36 +801,62 @@ complete: return IRQ_HANDLED; } - if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) { + if (stat & OMAP_I2C_STAT_RDR) { u8 num_bytes = 1; + if (dev->fifo_size) + num_bytes = dev->buf_len; + + while (num_bytes--) { + if (!dev->buf_len) { + dev_err(dev->dev, + "RDR IRQ while no data" + " requested\n"); + break; + } + + w = omap_i2c_read_reg(dev, OMAP_I2C_DATA_REG); + *dev->buf++ = w; + dev->buf_len--; + + /* + * Data reg in 2430, omap3 and + * omap4 is 8 bit wide + */ + if (dev->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { + if (dev->buf_len) { + *dev->buf++ = w >> 8; + dev->buf_len--; + } + } + } + if (dev->errata & I2C_OMAP_ERRATA_I207) i2c_omap_errata_i207(dev, stat); - if (dev->fifo_size) { - if (stat & OMAP_I2C_STAT_RRDY) - num_bytes = dev->fifo_size; - else /* read RXSTAT on RDR interrupt */ - num_bytes = (omap_i2c_read_reg(dev, - OMAP_I2C_BUFSTAT_REG) - >> 8) & 0x3F; - } + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); + continue; + } + + if (stat & OMAP_I2C_STAT_RRDY) { + u8 num_bytes = 1; + + if (dev->fifo_size) + num_bytes = dev->fifo_size; + while (num_bytes--) { if (!dev->buf_len) { - if (stat & OMAP_I2C_STAT_RRDY) - dev_err(dev->dev, + dev_err(dev->dev, "RRDY IRQ while no data" - " requested\n"); - if (stat & OMAP_I2C_STAT_RDR) - dev_err(dev->dev, - "RDR IRQ while no data" - " requested\n"); + " requested\n"); break; } w = omap_i2c_read_reg(dev, OMAP_I2C_DATA_REG); *dev->buf++ = w; dev->buf_len--; + /* * Data reg in 2430, omap3 and * omap4 is 8 bit wide @@ -843,36 +869,68 @@ complete: } } } - omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_RRDY | - OMAP_I2C_STAT_RDR)); + + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RRDY); continue; } - if (stat & (OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)) { + if (stat & OMAP_I2C_STAT_XDR) { u8 num_bytes = 1; - if (dev->fifo_size) { - if (stat & OMAP_I2C_STAT_XRDY) - num_bytes = dev->fifo_size; - else /* read TXSTAT on XDR interrupt */ - num_bytes = omap_i2c_read_reg(dev, - OMAP_I2C_BUFSTAT_REG) - & 0x3F; + + if (dev->fifo_size) + num_bytes = dev->buf_len; + + while (num_bytes--) { + if (!dev->buf_len) { + dev_err(dev->dev, + "XDR IRQ while no " + "data to send\n"); + break; + } + + w = *dev->buf++; + dev->buf_len--; + + /* + * Data reg in 2430, omap3 and + * omap4 is 8 bit wide + */ + if (dev->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { + if (dev->buf_len) { + w |= *dev->buf++ << 8; + dev->buf_len--; + } + } + + if ((dev->errata & I2C_OMAP_ERRATA_I462) && + errata_omap3_i462(dev, &stat, &err)) + goto complete; + + omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); } + + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_XDR); + continue; + } + + if (stat & OMAP_I2C_STAT_XRDY) { + u8 num_bytes = 1; + + if (dev->fifo_size) + num_bytes = dev->fifo_size; + while (num_bytes--) { if (!dev->buf_len) { - if (stat & OMAP_I2C_STAT_XRDY) - dev_err(dev->dev, + dev_err(dev->dev, "XRDY IRQ while no " "data to send\n"); - if (stat & OMAP_I2C_STAT_XDR) - dev_err(dev->dev, - "XDR IRQ while no " - "data to send\n"); break; } w = *dev->buf++; dev->buf_len--; + /* * Data reg in 2430, omap3 and * omap4 is 8 bit wide @@ -891,8 +949,8 @@ complete: omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); } - omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_XRDY | - OMAP_I2C_STAT_XDR)); + + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_XRDY); continue; }