From patchwork Tue Aug 21 14:33:56 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1355371 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 06B6C3FD40 for ; Tue, 21 Aug 2012 14:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754772Ab2HUOeO (ORCPT ); Tue, 21 Aug 2012 10:34:14 -0400 Received: from na3sys009aog120.obsmtp.com ([74.125.149.140]:46420 "EHLO na3sys009aog120.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754738Ab2HUOeN (ORCPT ); Tue, 21 Aug 2012 10:34:13 -0400 Received: from mail-ee0-f52.google.com ([74.125.83.52]) (using TLSv1) by na3sys009aob120.postini.com ([74.125.148.12]) with SMTP ID DSNKUDOcZPISjEaah8hCYq85sgLS1KpAfXxP@postini.com; Tue, 21 Aug 2012 07:34:13 PDT Received: by eekc41 with SMTP id c41so1576762eek.25 for ; Tue, 21 Aug 2012 07:34:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=mSg2GWradqTd2BNF2mQtieHELvD3LHeJSumEjs3NPsA=; b=PVwLP4U4syjULV+VyAyTHiCiOwtQt78SePICKaYxlsRsgLIrGVZ7MYB0x6Ru9meMnI urjxoVwsM/Gy0cfIjNNtXWeI48E0dmmuW+73DipcS/nF+UDi31FscL1Xrmx72SGbP2n4 OQnpMCjlgAvoPSFsrnDwHT4+hoBZMIebfvXstLtk//VpzIxBgZk5its9FUGRUytbIZSr NE4AYIIn1yoK2LVL/2yzisdp8bSf3XSZ8QlFH/zJjQaGHML/F6kj0iRhCe6TO0ZAnZ/l e7ZFDToZcqP99fqiRYLwaCss92fBbd0ituKFt95yS7cB2RfihPXyYHG70BsLXivaWh4D +rxw== Received: by 10.14.184.133 with SMTP id s5mr13922458eem.31.1345559651577; Tue, 21 Aug 2012 07:34:11 -0700 (PDT) Received: from localhost.localdomain (176.39.21.109.rev.sfr.net. [109.21.39.176]) by mx.google.com with ESMTPS id k49sm4963259een.4.2012.08.21.07.34.08 (version=SSLv3 cipher=OTHER); Tue, 21 Aug 2012 07:34:10 -0700 (PDT) From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , Tony Lindgren Cc: Jarkko Nikula , alsa-devel@alsa-project.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, Benoit Cousson Subject: [PATCH] ASoC: omap-mcbsp: Device tree binding documentation update Date: Tue, 21 Aug 2012 17:33:56 +0300 Message-Id: <1345559636-23370-1-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 X-Gm-Message-State: ALoCoQm2lkMvExlh927KiDEX0R08LF+aXuRKhg1t+xXS5pTJeARpHY13Bjqcau0CSrCdTWVe6V89 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org To reflect the final devicetree node structure of McBSPs. Signed-off-by: Peter Ujfalusi --- Hello, the initial OMAP McBSP DT structure was not able to describe the IP (and it's versions) correctly. The main issue was the sidetone block of McBSP2/3 on OMAP3. With this change in the DT description the OS can get the needed information about the IP. The sidetone is still not supported when the Linux kernel is booted with DT since we still depend on hwmod to fill the resources. This patch depend on the McBSP DT support series going via audio tree. Regards, Peter .../devicetree/bindings/sound/omap-mcbsp.txt | 28 +++++++------------ 1 files changed, 10 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/omap-mcbsp.txt b/Documentation/devicetree/bindings/sound/omap-mcbsp.txt index 447cb13..17cce44 100644 --- a/Documentation/devicetree/bindings/sound/omap-mcbsp.txt +++ b/Documentation/devicetree/bindings/sound/omap-mcbsp.txt @@ -8,38 +8,30 @@ Required properties: - reg: Register location and size, for OMAP4+ as an array: , ; +- reg-names: Array of strings associated with the address space - interrupts: Interrupt numbers for the McBSP port, as an array in case the McBSP IP have more interrupt lines: , , ; +- interrupt-names: Array of strings associated with the interrupt numbers - interrupt-parent: The parent interrupt controller - ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC) - ti,hwmods: Name of the hwmod associated to the McBSP port -Sidetone support for OMAP3 McBSP2 and 3 ports: -- sidetone { }: Within this section the following parameters are required: -- reg: Register location and size for the ST block -- interrupts: The interrupt number for the ST block -- interrupt-parent: The parent interrupt controller for the ST block - Example: mcbsp2: mcbsp@49022000 { compatible = "ti,omap3-mcbsp"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x49022000 0xff>; - interrupts = <0 17 0x4>, /* OCP compliant interrup */ - <0 62 0x4>, /* TX interrup */ - <0 63 0x4>; /* RX interrup */ + reg = <0x49022000 0xff>, + <0x49028000 0xff>; + reg-names = "mpu", "sidetone"; + interrupts = <0 17 0x4>, /* OCP compliant interrupt */ + <0 62 0x4>, /* TX interrupt */ + <0 63 0x4>, /* RX interrupt */ + <0 4 0x4>; /* Sidetone */ + interrupt-names = "common", "tx", "rx", "sidetone"; interrupt-parent = <&intc>; ti,buffer-size = <1280>; ti,hwmods = "mcbsp2"; - - sidetone { - reg = <0x49028000 0xff>; - interrupts = <0 4 0x4>; - interrupt-parent = <&intc>; - }; };