From patchwork Wed Aug 22 05:42:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Omar Ramirez Luna X-Patchwork-Id: 1359171 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 9D53CDF280 for ; Wed, 22 Aug 2012 05:43:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756447Ab2HVFm7 (ORCPT ); Wed, 22 Aug 2012 01:42:59 -0400 Received: from mail-ob0-f174.google.com ([209.85.214.174]:51181 "EHLO mail-ob0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756460Ab2HVFmp (ORCPT ); Wed, 22 Aug 2012 01:42:45 -0400 Received: by mail-ob0-f174.google.com with SMTP id uo13so909839obb.19 for ; Tue, 21 Aug 2012 22:42:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3Tzs70pEBEqQTpxoUOmMwY6bKSTb2XDmSFM2KCCbDjc=; b=S0ZfczqiFA21kwsetbiRuOULcM1ntCISpSaWAw0CARnDY/UOvwJ5Wwi3pibCGfmBBX j8hfDH6v1wDA5wqBcvZ3t/H6p6h+x0RyeTyAl0VZaM6gaincf8X3GLMveVq3tszueDDe 516g51zdeooEeHWbNWDmBrwqJb2om4alIU/9UvYBCLldpWJKytyJ7LRrCxwLkmD80zn6 egMfnp3lW/Hp8XwcuqbUmV1HFxxYd5Y8cDl1k4e4rW9e9+hN1s3HCCBoSxQMxR6lt+T7 0kmTvlEN+h+XsJd4O86jnaH5aDUAHCcD2l6FQF1kKvHbGy2FYUhChIpvHkFsqlq8l9S3 l3GQ== Received: by 10.60.3.106 with SMTP id b10mr14624561oeb.119.1345614165040; Tue, 21 Aug 2012 22:42:45 -0700 (PDT) Received: from uda0273944.am.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id a9sm3168240obp.14.2012.08.21.22.42.43 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 21 Aug 2012 22:42:44 -0700 (PDT) From: Omar Ramirez Luna To: Benoit Cousson , Paul Walmsley Cc: Tony Lindgren , Russell King , Kevin Hilman , Ohad Ben-Cohen , Tomi Valkeinen , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Omar Ramirez Luna Subject: [PATCH 2/2] ARM: OMAP: hwmod: revise deassert sequence Date: Wed, 22 Aug 2012 00:42:30 -0500 Message-Id: <1345614150-25723-3-git-send-email-omar.luna@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1345614150-25723-1-git-send-email-omar.luna@linaro.org> References: <1345614150-25723-1-git-send-email-omar.luna@linaro.org> X-Gm-Message-State: ALoCoQnJ7ug2JSoNT9xGml5npSlVEwDCQYG0KQlcRpKRj3FWy7jQ8LuR9Z+NGYcvKYm2BoKAnxgo Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org For a reset sequence to complete cleanly, a module needs its associated clocks to be enabled, otherwise the timeout check in prcm code can print a false failure (failed to hardreset) that occurs because the clocks aren't powered ON and the status bit checked can't transition without them. Signed-off-by: Omar Ramirez Luna --- arch/arm/mach-omap2/omap_hwmod.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index eaedc33..b65e021 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1509,6 +1509,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; int ret = -EINVAL; + int hwsup = 0; if (!oh) return -EINVAL; @@ -1520,10 +1521,46 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) if (IS_ERR_VALUE(ret)) return ret; + if (oh->clkdm) { + /* + * A clockdomain must be in SW_SUP otherwise reset + * might not be completed. The clockdomain can be set + * in HW_AUTO only when the module become ready. + */ + hwsup = clkdm_in_hwsup(oh->clkdm); + ret = clkdm_hwmod_enable(oh->clkdm, oh); + if (ret) { + WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", + oh->name, oh->clkdm->name, ret); + return ret; + } + } + + _enable_clocks(oh); + if (soc_ops.enable_module) + soc_ops.enable_module(oh); + ret = soc_ops.deassert_hardreset(oh, &ohri); + + if (soc_ops.disable_module) + soc_ops.disable_module(oh); + _disable_clocks(oh); + if (ret == -EBUSY) pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); + if (!ret) { + /* + * Set the clockdomain to HW_AUTO, assuming that the + * previous state was HW_AUTO. + */ + if (oh->clkdm && hwsup) + clkdm_allow_idle(oh->clkdm); + } else { + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); + } + return ret; }