From patchwork Thu Aug 23 09:29:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1365351 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id D4A9D3FCAE for ; Thu, 23 Aug 2012 09:29:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758187Ab2HWJ3c (ORCPT ); Thu, 23 Aug 2012 05:29:32 -0400 Received: from na3sys009aog120.obsmtp.com ([74.125.149.140]:49749 "EHLO na3sys009aog120.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758264Ab2HWJ3a (ORCPT ); Thu, 23 Aug 2012 05:29:30 -0400 Received: from mail-ob0-f177.google.com ([209.85.214.177]) (using TLSv1) by na3sys009aob120.postini.com ([74.125.148.12]) with SMTP ID DSNKUDX3+nF4dZgWAy/CqCQl5hqox324zD8H@postini.com; Thu, 23 Aug 2012 02:29:30 PDT Received: by obbta17 with SMTP id ta17so1185711obb.8 for ; Thu, 23 Aug 2012 02:29:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=U8ctW4yEDKwMnLtOQF0cTD1YsDlnDajf2v4M9gOHCBg=; b=pPDVqgnxmb6u+vowepNh3uwbpqjug/voYAbL/oEMys1GoUd97AJgZAde2UPMVJOvMQ NRnnefC1j7/p9r/nC+cUgBHj6vKTGu6AX6chtrVTh0/FGFbkJOGJRp8vMBXLzb4+UvIu rSeAcfh3JSBlxnAz2OgRX/RN+o68iJB5kdzC8GNcilhxsct9hkxggC3Ebl1Mafd99CEN eNh1q6LO3rSIF7feNwRms6t5ltliKx7zeQEzyRRgyRR/ci4c1CVJk48kZwuqmluX3TzX ZDEZYfIX+hNs1CqVpJj2qDWShP1HM+3/WIVIbee4wjx8UjaryuCB97v+bndXJHxn9E+u JE6g== Received: by 10.182.217.38 with SMTP id ov6mr557726obc.33.1345714169791; Thu, 23 Aug 2012 02:29:29 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id jl8sm6208199obb.18.2012.08.23.02.29.27 (version=SSLv3 cipher=OTHER); Thu, 23 Aug 2012 02:29:29 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, Benoit Cousson Subject: [PATCH 3/6] ARM/dts: OMAP3: Add McBSP entries Date: Thu, 23 Aug 2012 12:29:10 +0300 Message-Id: <1345714153-13094-4-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> References: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQl02l1Ul5kjxyi2UfOFYIzQUVe3F5hFYqzoAEvQ73NcbuWGkK9BYmAagUcEbYKrwGnpk2dm Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap3.dtsi | 69 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 69 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 8109471..5c14b00 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -220,5 +220,74 @@ compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; }; + + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <0 16 0x4>, /* OCP compliant interrupt */ + <0 59 0x4>, /* TX interrupt */ + <0 60 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@49022000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49022000 0xff>, + <0x49028000 0xff>; + reg-names = "mpu", "sidetone"; + interrupts = <0 17 0x4>, /* OCP compliant interrupt */ + <0 62 0x4>, /* TX interrupt */ + <0 63 0x4>, /* RX interrupt */ + <0 4 0x4>; /* Sidetone */ + interrupt-names = "common", "tx", "rx", "sidetone"; + interrupt-parent = <&intc>; + ti,buffer-size = <1280>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@49024000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49024000 0xff>, + <0x4902a000 0xff>; + reg-names = "mpu", "sidetone"; + interrupts = <0 22 0x4>, /* OCP compliant interrupt */ + <0 89 0x4>, /* TX interrupt */ + <0 90 0x4>, /* RX interrupt */ + <0 5 0x4>; /* Sidetone */ + interrupt-names = "common", "tx", "rx", "sidetone"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@49026000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49026000 0xff>; + reg-names = "mpu"; + interrupts = <0 23 0x4>, /* OCP compliant interrupt */ + <0 54 0x4>, /* TX interrupt */ + <0 55 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; + + mcbsp5: mcbsp@48096000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x48096000 0xff>; + reg-names = "mpu"; + interrupts = <0 27 0x4>, /* OCP compliant interrupt */ + <0 81 0x4>, /* TX interrupt */ + <0 82 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp5"; + }; }; };