From patchwork Thu Aug 23 09:29:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1365361 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 99B793FCAE for ; Thu, 23 Aug 2012 09:29:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932234Ab2HWJ3e (ORCPT ); Thu, 23 Aug 2012 05:29:34 -0400 Received: from na3sys009aog113.obsmtp.com ([74.125.149.209]:35472 "EHLO na3sys009aog113.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758222Ab2HWJ3d (ORCPT ); Thu, 23 Aug 2012 05:29:33 -0400 Received: from mail-ob0-f179.google.com ([209.85.214.179]) (using TLSv1) by na3sys009aob113.postini.com ([74.125.148.12]) with SMTP ID DSNKUDX3/PXYE8A3OvfisEV+3UGbPc0ezvw2@postini.com; Thu, 23 Aug 2012 02:29:32 PDT Received: by obbeh20 with SMTP id eh20so923661obb.10 for ; Thu, 23 Aug 2012 02:29:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=MtENfuGD6hikRlaFzHD6RsKTXKzcHvuR9jv2+yUIyxY=; b=g+jIpj52g04h38LWdQxa1SDIOthSo39iOPA9wa0AK4vBscYei6TCFx0uJxV2jnz8MQ HEVIEgIlc/IjoJZZqTsP1g9TjulFb+oqpV3DPDyQoG+oRohhYHxPykQBG/ElHhqYtL2j jGnYmmqdJJfJJPr+WpsNwY61Ihs2CfUZUR2C9hJ0Hvnyo3VUeupu2nS8t/2ojvuP8jhP m4Sjkr3r3OT3zk+rZmqGUYnZEI4GQE2cder3k4KUidy6ZcfCy4cA4vLdhztsqOJVxzV8 BbeoTbx3tv86Nkm+wWUM0VYP0hvP2IVOXHgCxb8Zvz9Zxtq+OQHx5QgoVTTRBrhMHMgv qqSA== Received: by 10.182.118.8 with SMTP id ki8mr537425obb.79.1345714171777; Thu, 23 Aug 2012 02:29:31 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id jl8sm6208199obb.18.2012.08.23.02.29.29 (version=SSLv3 cipher=OTHER); Thu, 23 Aug 2012 02:29:31 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, Benoit Cousson Subject: [PATCH 4/6] ARM/dts: OMAP4: Add McBSP entries Date: Thu, 23 Aug 2012 12:29:11 +0300 Message-Id: <1345714153-13094-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> References: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQnbh/1HkkfMhl4um6ewmbE+RTrrThGGyAB6L/3CKS1juaIZAsC9NMOnmdaXLpvGH7yaYgSC Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 47 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 04cbbcb..258435f 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -295,5 +295,52 @@ interrupt-parent = <&gic>; ti,hwmods = "dmic"; }; + + mcbsp1: mcbsp@40122000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40122000 0xff>, /* MPU private access */ + <0x49022000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 17 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@40124000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40124000 0xff>, /* MPU private access */ + <0x49024000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 22 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@40126000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40126000 0xff>, /* MPU private access */ + <0x49026000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 23 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@48096000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x48096000 0xff>; /* L4 Interconnect */ + reg-names = "mpu"; + interrupts = <0 16 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; }; };