From patchwork Wed Aug 29 13:31:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1384881 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 7107D3FDF5 for ; Wed, 29 Aug 2012 13:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753487Ab2H2NbH (ORCPT ); Wed, 29 Aug 2012 09:31:07 -0400 Received: from na3sys009aog111.obsmtp.com ([74.125.149.205]:41916 "EHLO na3sys009aog111.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753481Ab2H2NbG (ORCPT ); Wed, 29 Aug 2012 09:31:06 -0400 Received: from mail-ob0-f174.google.com ([209.85.214.174]) (using TLSv1) by na3sys009aob111.postini.com ([74.125.148.12]) with SMTP ID DSNKUD4ZmdDqLv2SZhBmFVjt2jOfQaXo8pGL@postini.com; Wed, 29 Aug 2012 06:31:06 PDT Received: by obbuo13 with SMTP id uo13so911688obb.19 for ; Wed, 29 Aug 2012 06:31:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=NeGnl31ZidrxGn8musJH+jUs55ushpRNBNvi4zTknkE=; b=imXS88S0WsYj3R3LH48+Q3ueUjhcvGcg57iEN7XOABfsisMgopuhuZdrcw5R8H9Qh5 3iRd4nz1uUwLmy+kiRM+0ohzU/K+sNp3LiXXjldZJLpPIYWsLkZFUuJcBh/6sczB1ITe w2NTwN3Qx55ygaBC1pGMvxRajqam+8S+2JfKt70ttuGTsC+X5aTwn38wk+vZj9yHsF6w 5TSBMixmdhn+knl/EIXFsiqKq4DCL9ckPIaDX959a4IdpeVpjZS62WZEQnvFeACBa/3C rRhYJ/MsHA5MAJl+tRf7WOll8O9orMQJh6K0ZUdgh3o8m+DifUVGTKVG0zldZKkHUBsw i64A== Received: by 10.182.1.10 with SMTP id 10mr1167750obi.54.1346247065285; Wed, 29 Aug 2012 06:31:05 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id bp7sm22491641obc.12.2012.08.29.06.31.03 (version=SSLv3 cipher=OTHER); Wed, 29 Aug 2012 06:31:04 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Cc: Benoit Cousson , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v2 1/8] ARM/dts: OMAP2: Add McBSP entries for OMAP2420 and OMAP2430 SoC Date: Wed, 29 Aug 2012 16:31:00 +0300 Message-Id: <1346247067-9632-2-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> References: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQn/xeYg/2SvZrlRsZh7iUxjeDOl6W5Pf4E/rr5YDuadv+w1VBMRQB/wpSmUhpQbCGfGETNx Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The McBSP IP within OMAP2420 and 2430 is different we need to create separate dtsi files for them. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap2420.dtsi | 39 ++++++++++++++++++ arch/arm/boot/dts/omap2430.dtsi | 83 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 122 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/omap2420.dtsi create mode 100644 arch/arm/boot/dts/omap2430.dtsi diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi new file mode 100644 index 0000000..f375c68 --- /dev/null +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -0,0 +1,39 @@ +/* + * Device Tree Source for OMAP2420 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap2.dtsi" + +/ { + compatible = "ti,omap2420", "ti,omap2"; + + ocp { + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap2420-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <0 59 0x4>, /* TX interrupt */ + <0 60 0x4>; /* RX interrupt */ + interrupt-names = "tx", "rx"; + interrupt-parent = <&intc>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@48076000 { + compatible = "ti,omap2420-mcbsp"; + reg = <0x48076000 0xff>; + reg-names = "mpu"; + interrupts = <0 62 0x4>, /* TX interrupt */ + <0 63 0x4>; /* RX interrupt */ + interrupt-names = "tx", "rx"; + interrupt-parent = <&intc>; + ti,hwmods = "mcbsp2"; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi new file mode 100644 index 0000000..531e346 --- /dev/null +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -0,0 +1,83 @@ +/* + * Device Tree Source for OMAP243x SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap2.dtsi" + +/ { + compatible = "ti,omap2430", "ti,omap2"; + + ocp { + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <0 64 0x4>, /* OCP compliant interrupt */ + <0 59 0x4>, /* TX interrupt */ + <0 60 0x4>, /* RX interrupt */ + <0 61 0x4>; /* RX overflow interrupt */ + interrupt-names = "common", "tx", "rx", "rx_overflow"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@48076000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48076000 0xff>; + reg-names = "mpu"; + interrupts = <0 16 0x4>, /* OCP compliant interrupt */ + <0 62 0x4>, /* TX interrupt */ + <0 63 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@4808c000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x4808c000 0xff>; + reg-names = "mpu"; + interrupts = <0 17 0x4>, /* OCP compliant interrupt */ + <0 89 0x4>, /* TX interrupt */ + <0 90 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@4808e000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x4808e000 0xff>; + reg-names = "mpu"; + interrupts = <0 18 0x4>, /* OCP compliant interrupt */ + <0 54 0x4>, /* TX interrupt */ + <0 55 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; + + mcbsp5: mcbsp@48096000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48096000 0xff>; + reg-names = "mpu"; + interrupts = <0 19 0x4>, /* OCP compliant interrupt */ + <0 81 0x4>, /* TX interrupt */ + <0 82 0x4>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp5"; + }; + }; +};