From patchwork Wed Aug 29 13:31:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1384911 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 138B33FDF5 for ; Wed, 29 Aug 2012 13:31:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753661Ab2H2NbR (ORCPT ); Wed, 29 Aug 2012 09:31:17 -0400 Received: from na3sys009aog132.obsmtp.com ([74.125.149.250]:33214 "EHLO na3sys009aog132.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753589Ab2H2NbQ (ORCPT ); Wed, 29 Aug 2012 09:31:16 -0400 Received: from mail-ob0-f174.google.com ([209.85.214.174]) (using TLSv1) by na3sys009aob132.postini.com ([74.125.148.12]) with SMTP ID DSNKUD4Zo89PpBDQZ57xwzzua5Hquf8ssfZp@postini.com; Wed, 29 Aug 2012 06:31:16 PDT Received: by obbuo13 with SMTP id uo13so912004obb.19 for ; Wed, 29 Aug 2012 06:31:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=MtENfuGD6hikRlaFzHD6RsKTXKzcHvuR9jv2+yUIyxY=; b=XgwwZdK0bOIg/ARYD0ZbMjNqq+UF/MQUAHIBGPhy67V8rd2RJV7Ee+4gS7MTG/qgDB tGQWUWkvcEgJhiNw6NyARk53nd+aoSbykiHiaxyZ1UsX2bsrglrRz3SBQ05zWH/j8efN yF7yEo32i3JR4II2TfW63elRLRpC2XhRO9V/EOlQgsuEF51ThLqgUtGZgHEOSKc03r63 WAwRDmIyBXzCWMEDQzv2jb0v4taovHg5dUu8rUZH+xaMmtIbWF7914vTHE+p0RIQFvc1 CYZPDLhcBnOqzm25gscyH2rsILKlB6/rj2z+kJIqyVdxNfOKYJBFA1HH1oUe+E23RRfS U5qg== Received: by 10.60.29.165 with SMTP id l5mr1197187oeh.105.1346247072850; Wed, 29 Aug 2012 06:31:12 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id bp7sm22491641obc.12.2012.08.29.06.31.10 (version=SSLv3 cipher=OTHER); Wed, 29 Aug 2012 06:31:12 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Cc: Benoit Cousson , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v2 4/8] ARM/dts: OMAP4: Add McBSP entries Date: Wed, 29 Aug 2012 16:31:03 +0300 Message-Id: <1346247067-9632-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> References: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQnQ11vQI3d50SNKIir4W0a81ksSNiPCVU0Q0cW4aiYigUuJNxPlBPUUBFGytUYriAOd20sj Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 47 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 04cbbcb..258435f 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -295,5 +295,52 @@ interrupt-parent = <&gic>; ti,hwmods = "dmic"; }; + + mcbsp1: mcbsp@40122000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40122000 0xff>, /* MPU private access */ + <0x49022000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 17 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@40124000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40124000 0xff>, /* MPU private access */ + <0x49024000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 22 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@40126000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40126000 0xff>, /* MPU private access */ + <0x49026000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 23 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@48096000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x48096000 0xff>; /* L4 Interconnect */ + reg-names = "mpu"; + interrupts = <0 16 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; }; };