From patchwork Wed Sep 5 11:58:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1408961 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 9D8AB40220 for ; Wed, 5 Sep 2012 11:58:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753009Ab2IEL6r (ORCPT ); Wed, 5 Sep 2012 07:58:47 -0400 Received: from na3sys009aog103.obsmtp.com ([74.125.149.71]:56605 "EHLO na3sys009aog103.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752464Ab2IEL6q (ORCPT ); Wed, 5 Sep 2012 07:58:46 -0400 Received: from mail-gh0-f174.google.com ([209.85.160.174]) (using TLSv1) by na3sys009aob103.postini.com ([74.125.148.12]) with SMTP ID DSNKUEc+dVYlSo+op2TgIQqVUnOTw4/xmaiL@postini.com; Wed, 05 Sep 2012 04:58:46 PDT Received: by ghrr11 with SMTP id r11so51346ghr.19 for ; Wed, 05 Sep 2012 04:58:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=PNjviXoEZYM3D/KKyzsDR1TK3fI0uQiiborE1mUxPAo=; b=iyJOjSxU+1y6ixJRD8G3tRXOjLpHBdpXgHYMDqMecBXcyQOFzKbO98CtGRlsZ44KQj HxHhyiTE0XNz+h/jYs+1tBmHf4ZbjzFSSR3FfQj+SyaDU2OLdg/QbWU0Evao7g1Lpf8C 1Jgr0SYMZ4AugXCEywYoUrx48VU+AP7YbqyCu5RudNSiHh3KjLl064/9H5/3L6QwXQdL nuYu1fzU5s/P+G4ysUeWryBB/dpgp4B/5XNjZ1mJNn4W0yT6TyawkZUpVHm9Uu3ZSWyV i+4Ul6/7RYQCWtKJPZZvb4VfdZMbOKQ21yuobf3UtfdLf9Z8UUWkNcBpMGBEC0l4rA/Q nVcg== Received: by 10.236.176.71 with SMTP id a47mr22701818yhm.43.1346846324929; Wed, 05 Sep 2012 04:58:44 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id h8sm1450364ank.9.2012.09.05.04.58.42 (version=SSLv3 cipher=OTHER); Wed, 05 Sep 2012 04:58:44 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren , Benoit Cousson Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC Date: Wed, 5 Sep 2012 14:58:49 +0300 Message-Id: <1346846336-27321-2-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1346846336-27321-1-git-send-email-peter.ujfalusi@ti.com> References: <1346846336-27321-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQm5CLU27kt74NbcWj5Uirk8KsKr7lS1lFv0ajr1EHhnEvslaTOSkNbgYlV4hoYvNGW2NVdm Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The McBSP IP within OMAP2420 and 2430 is different we need to create separate dtsi files for them. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap2420.dtsi | 39 +++++++++++++++++++ arch/arm/boot/dts/omap2430.dtsi | 83 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 122 insertions(+) create mode 100644 arch/arm/boot/dts/omap2420.dtsi create mode 100644 arch/arm/boot/dts/omap2430.dtsi diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi new file mode 100644 index 0000000..6174d3d --- /dev/null +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -0,0 +1,39 @@ +/* + * Device Tree Source for OMAP2420 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap2.dtsi" + +/ { + compatible = "ti,omap2420", "ti,omap2"; + + ocp { + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap2420-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <59>, /* TX interrupt */ + <60>; /* RX interrupt */ + interrupt-names = "tx", "rx"; + interrupt-parent = <&intc>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@48076000 { + compatible = "ti,omap2420-mcbsp"; + reg = <0x48076000 0xff>; + reg-names = "mpu"; + interrupts = <62>, /* TX interrupt */ + <63>; /* RX interrupt */ + interrupt-names = "tx", "rx"; + interrupt-parent = <&intc>; + ti,hwmods = "mcbsp2"; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi new file mode 100644 index 0000000..59a639a --- /dev/null +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -0,0 +1,83 @@ +/* + * Device Tree Source for OMAP243x SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap2.dtsi" + +/ { + compatible = "ti,omap2430", "ti,omap2"; + + ocp { + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <64>, /* OCP compliant interrupt */ + <59>, /* TX interrupt */ + <60>, /* RX interrupt */ + <61>; /* RX overflow interrupt */ + interrupt-names = "common", "tx", "rx", "rx_overflow"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@48076000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48076000 0xff>; + reg-names = "mpu"; + interrupts = <16>, /* OCP compliant interrupt */ + <62>, /* TX interrupt */ + <63>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@4808c000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x4808c000 0xff>; + reg-names = "mpu"; + interrupts = <17>, /* OCP compliant interrupt */ + <89>, /* TX interrupt */ + <90>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@4808e000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x4808e000 0xff>; + reg-names = "mpu"; + interrupts = <18>, /* OCP compliant interrupt */ + <54>, /* TX interrupt */ + <55>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; + + mcbsp5: mcbsp@48096000 { + compatible = "ti,omap2430-mcbsp"; + reg = <0x48096000 0xff>; + reg-names = "mpu"; + interrupts = <19>, /* OCP compliant interrupt */ + <81>, /* TX interrupt */ + <82>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp5"; + }; + }; +};